Hello again guys,
I am not trying to be wishy washy but the more I think on this one the more my mind wants to say that the ADD (or any Math instruction for that matter) does not execute if the rung instructions preceding it are false.
It will still execute, but "execute", but not in the sense of "add a + b and store in destination". It will "execute" in that if it's rung in condition is false, it's rung out condition will become false, and vice versa. You can prove this by setting up my test rung, adding in the xic before the add, and then turning the first bit on the rung on. You will notice that the add instruction does not add, and the OTE stays off. Then turn on the XIC just in front of the ADD. The ADD will add the two values, and your OTE will turn on.
Now. Turn your xic before the ADD back off. What happens to the OTE? It turns off. Why? Because the rung out condition from the ADD instruction is now false, along with the rung out condition from the two other XIC branches, and so the rung in condition of the OTE is now false.
If the ADD instruction did not execute at all if the preceding XIC were false, then it's rung out condition would remain on. As this is not the case, we know that the PLC encounters the add instruction, ignores the values and destination, but still does SOMETHING (i.e. turns off the rung out condition).
Bering C Sparky said:
1) The Ladder that ASF shows in his post with the unconditional ADD instruction on the Parallel Rung..... This ADD instruction will work the same no matter if it is installed in a PLC, SCL, MLX or CLX, if the first instruction on the main rung is true then the ADD will continue to incriment unconditonally every scan.
But if the first instruction is false then it will not increment, does not matter what A.B. Platform we are using. (would every one agree with this???)
You will not be permitted to use the add instruction in this way on a micrologix or SLC. Only CLX platforms support this type of nesting.
Bering C Sparky said:
2) So if that is the case then if the first XIC instruction is false.....How is the ADD instruction Executing anything.
There is nothing in the data table/ tag values that would suggest this instruction is going out and writing anything. (Unless of course it is actually going out and over writing the same value in the destination word, dint, real, etc.)
If this is the case then the same would be said for MOV, COP, etc instructions that are preceded by false conditions on the rung.
(Since no one came back right away and confirmed or denied this it got me wondering)
You cannot monitor the rung in and rung out status for these instructions (well, not to my knowledge), and you're right that it's not writing data to anything that you can see - but the PLC still evaluates the instruction
Bering C Sparky said:
3) I started looking through a training manual and found a small example of a output that does nothing if instructions are false prececing it on the rung.
That example is the latch and unlatch instructions.
They are at the bit level so this comparison is apples to apples.
A normal OTE bit output preceded by false instructions will go and write a 0 in its BIT BOX in the data table or tag value.
However if we are talking about a Latch or UnLatch instruction.....when they are preceded by false instructions then they do nothing for that scan, they do not go and write a 1 or a 0 in the bit box. it simply stays the state that it is in. (Does everyone agree with this also.)
Again, it will still evaluate it and change the rung out condition to suit. In CLX you can put multiple OTL or OTU in series - if your OTL has another OTL after it, that next OTL needs to know the rung out condition of the previous one to know if it's supposed to latch it's tag or not.
Bering C Sparky said:
4) So with this example does everyone still say that Math, MOV, COP, etc instructions are EXECUTED every scan???
And if so how are they EXECUTED???
(How can we show with out a doubt that something happens in the data/tag tables each scan for these type of instructions.)
It says exactly that in the technote:
every instruction on the rung is executed. They perform functions that you can see when their rung in condition is true, and functions that you (usually) can't when their rung in condition is false.
I'll raise the example again of a rung I programmed that caused PLC faults due to faulty indirect addressing. I AFI'd the whole rung until I could track down the problem, but it still kept faulting on that rung. So that says to me, that even though every instruction on that rung had a false rung in condition, even though it doesn't perform any actions on it, the PLC still evaluates each and every instruction - even to the extent of checking the validity of tags and pointers within the operands that it's not going to do anything to.
Aaaaaanyway it's friday here and it's 5 past beer time so I'm off for the weekend! Hope I've managed to explain that somewhat coherently!