FALSE FIRST rung construction ...

I've received several "off board" requests for this material over the last week or so – mostly from former students who are asking for my opinion on the subject being discussed in another recent forum thread ... I'm working non-stop on some other project$ - so this will have to be brief ...

the basic question being asked is this:

does it make any difference to a PLC processor's "scan time" whether you put "usually FALSE" conditions at the beginning – or at the end – of a string of conditions? ...

Click to expand...

based on my experiments along these lines (going back several years) the simple answer is "yes" ...

but that having been said, in my opinion it would be a VERY RARE occasion where the slight difference in time savings would make a measurable difference in the overall system's operation ... it's sort of like the idea that properly inflating the tires on your car will give you better gas mileage ... I don't doubt that theory at all – the physics involved seem to be completely obvious ... but – then again ... trying to set up an experiment to PROVE that the idea is true would be hard to do ... other variables - such as wind resistance, road surface temperature, the orbital position of the moon, and so on – could easily throw the results of any test into question ...

but ... on to the point of this post ...

shown below is a little experiment that I have SUCCESSFULLY used for years to PROVE that the "FALSE at the beginning" idea actually is indeed a fact ...

the platform that I used for this post is an Allen-Bradley SLC-5/04 processor – running OS 401 – version C – with Firmware Revision Number 3-8 ... naturally any other system would give different results – but the "proof in the pudding" should still be obtainable ...

if you're going to try this yourself (which is highly recommended) then be sure to play by the rules ... otherwise your results will be all over the board – and the experiment will be worthless ...

(1) remove and/or disable ALL I/O ...
(2) disable any "extra" communication channels ...
(3) make sure that this the ONLY code in the processor ...

and MOST important of all:

(4) you must be OFFLINE while you are actually running the test ...

as mentioned in the figure below, I ran my experiments by installing only ONE of the "test" rungs shown at a time ...

then I would manually reset the value of F8:0 to 0.0 ... (you don't have to worry about resetting the TON timer – prescan will take care of that) ...

then I would go OFFLINE – and use the processor's key switch to put the system into the RUN mode ...

then I'd wait AT LEAST 60 seconds for the timer to run out ...

then I'd go back online and check the number in F8:0 ...

key point:

the number in F8:0 represents how many "scans" (passes) the processor was able to make through the code within the 60 second timeframe allowed by the timer's Preset ...

so – a HIGHER number means a FASTER scan rate ...

here are the results that I got when running each of the rungs through three separate tests:

Rung 2 – 5310, 5314, 5315 ... I'd say 5314 is par for the course ...
Rung 3 – 5310, 5315, 5315 ... I'd say 5315 is par for the course ...
Rung 4 – 5290, 5284, 5292 ... I'd say 5290 is par for the course ...
Rung 5 – 5311, 5310, 5313 ... I'd say 5311 is par for the course ...
Rung 6 – 5265, 5265, 5264 ... I'd say 5265 is par for the course ...

based on these results, I'd say that the "FALSE first" rungs (2, 3, and 5) are the fastest ...

rung 6 is the slowest – it has a lot more conditions to check before it can finally come up with a FALSE evaluation ...

rung 4 comes in around the middle of the scale ...

naturally you can't expect the same conditions to come up with exactly the same values in one test repetition after another – but personally I've always been impressed with how repeatable the results actually turn out ... we're dealing with a variation of something like just five or six scans over a 60 second period ... and keep in mind that the resolution for the TON timer is (at best) 0.01 seconds – so some variation in the results is inevitable ...

anyway – I've got to get back to work now ... I hope this helps to further the discussion ...

in closing – I'm prepared to say that: "Yes, the FALSE FIRST idea DOES make a scantime difference" ... but personally, I don't check the inflation of my tires all that often – even if it COULD save me some gas ... and I certainly don't drive with my tailgate open hoping to cut down on wind resistance ... frankly, I've usually got bigger things to think about ...

PS – for the former students who have asked: "Did we cover this topic in the class?" – the answer is YES – remember the "There is no Santa" lesson ...

party on ...

.

If someone has the equipment, time and inclination I would suggest a tweak to Ron's test.

Duplicate each test rung 10 times or so and run it again. Or, as an alternative, run the test with no boolean rungs in place. No matter how complicated the rung looks, boolean operations don't take that much time. The floating point ADD and the general processor housekeeping can account for a large amount of the time taken. The average scan time based on the number of scans in 6 seconds is right around 1.1 msec. The test with no boolean rungs in place will establish a scan baseline. Duplicating the rungs will multiply any effect the change in boolean logic will make while keeping the baseline scan the same.

Keith

Greetings Keith ...

I'll have the same equipment set up in my home lab for several days – and I can run any test that you like ... (it might take a day or so to get around to it – but I will eventually make it happen) ...

to be honest, I'm not 100% sure that I understand what you're asking for ... could you nail it down for me, please? ...

my objective was not to calculate – or even guesstimate – the processor's scan time ... all I wanted to do was compare apples to apples – and oranges to oranges – as much as possible ...

I think that I accomplished that (at least to my personal satisfaction) by comparing rung 3 with rung 4 ... they both have exactly the same number of instructions – and they both give the same FALSE final result ...

but ...

the FALSE FIRST rung construction (rung 3) allows the processor to accomplish significantly more scan cycles than the FALSE LAST rung construction (rung 4) ...

I think that was the main question on everyone's mind – at least that was my impression from the questions that I've received ...

on the subject of the "benchtest" rungs (0 and 1) – those stayed the same throughout ALL of the tests ... so although they certainly DID affect the overall scantime, I personally don't see how they would have affected the simple "count the number of scans" tests that I have been running ... am I missing something there? ...

let me know if you have any other tests you'd like run ... I'll find time to make them happen as soon as I get a chance ...