Block transfer without using BTR or BTW

[accidentalengineer]

I am new to RIO addressing. The system that I am working on has a SLC 5/05 reading data from a 1746-NI8 (8 input analog card) that is located in a remote rack. A 1747-SN is used to read and write to the remote rack. (While I have had to do similar things to a PLC-5 system with an analog input card in the local rack, my memory is fuzzy and the RIO adds another level of difficulty.) To make matters more difficult the programmer did not use BTR and BTW instructions to communicate with the analog card and instead uses COP and MOV instructions, while making full use of M files. What is the advantage of this?

My problem may not be a problem at all. The current system only uses the first 4 analog inputs of the card and I simply want to verify that all 8 inputs are properly configured and being read. The fact that a COP instruction is used to move 8 words from M1:1.100 to N101:40 gives me suspicion that all 8 inputs are being read. I also know that N101:40 is the first analog input. Any educated guesses out there?

Forgive me for my ignorance, but I have a limited amount of time to figure this out.

 

[Ron Beaufort]

please give the precise model (catalog) number of your SLC processor - and ALL of the OS and Firmware Revision numbers ... some of the older units wouldn't handle Block Transfers - and that's probably the reason for what you're seeing ...

highly suggested: post your complete RSS file here (you'll have to zip it first - forum rule) ...

 

[accidentalengineer]

Here is the zipped version.

 

[accidentalengineer]

I should have mention that the part number is 1747-L552. OS500

 

[Ken Roach]

That's a fairly old processor; OS500 dates from 1993-1994 or so. Unless you upgrade the CPU firmware you won't get the BTR and BTW instructions.

The old method of copying a command buffer into the M0 file then copying the response out of the M1 file works with any operating system of SLC-500.

But it's not simple or obvious. The first thing to know is that the M0 and M1 files have 64-word Block Transfer data blocks that are spaced 100 address words apart: M1:1.100, .200, .300, etc.

Your conclusion that the M1:1.100 buffer contains the response from the Block Transfer Read is correct.

Look for a corresponding copy of data into M0:1.100 and you should find the configuration block for the 1746-NI8 module.

 

[accidentalengineer]

The relevant portion appears to begin iun rung 91 of LAD 2 MAIN. The analog input card resides in slot 5 of the remote IO rack. The 1747_ASB dip switches are configured for logical rack 0, logical group 0, 6 logical groups, 1 slot addressing. The g-file shows that logical rack 0, group 0 is a 3/4 slot rack.

 

[accidentalengineer]

Ken, actually I had a typo in my original post, 8 words are being copied from M1:1.110 (not M1:1.100 as earlier stated) to N101:40. I don't see anything being written into M0:1.110. Is it possible that data is not being written to the channel configuration words because by default they are already correctly configured for a 4-20ma input? If M1:1.110 through M1:1.117 are the channel data words, then wouldn't M0:1.110 through M0:1.117 bbe the corresponding channel configuration words? Why are these at 110 instead of 100?

 

[Ken Roach]

In LAD2, Rung 104 you'll see that the Configuration BTW for that 1746-NI8 module comes from data file N119:40 (length 8) and is placed in M0:1.210. I was wrong about my assumption about where the BTW data would be; it's in "Buffer 2", M0:1.200 / M1:1.200.

An examination of N119:40-47 finds that only the first 4 channels are getting nonzero configuration data.

The value of the configuration word is 2125 (decimal) = 0x084D (hex) = 0000100001001101 (binary).

From the 1746-NI8 user manual, that means:

4-20 mA range
Scaled for PID
Open Circuit = Up Scale
Enabled

I'd say if you copy that 2125 value into the rest of the N119:44, 45, 46, 47 words that the other four channels will be configured the same as the first four.

 

[accidentalengineer]

Ok, I think I may have the memory map figured out:
M0:1.100 through M0:1.102 are the BTR config adresses
M1:1.200 through M1:1.202 are for the BTW instruction
M1:1.110 through M1:1.117 are the channel data words
M0:1.210 through M0:1.217 are the channel configuration words

Is this right? It sort of makes some sense. I noticed that 8 words are copied into M0:1.210 from N119:40. N119:40 through N119:43 contain decimal 2125 - this would configure those four inputs for 4 to 20ma. N119:44 through N119:47 contain 0s. therefore I will have to stick a 2125 in those locations to correctly configure those four inputs. But it appears that all 8 data words are being read, so nothing needs to be done there - except to read and scale the inputs.

Do I have it right? Can it get any more convoluted then that? Whew!!!

 

[accidentalengineer]

Thanks Ken, I was typing my reply when you posted your reply. I am glad that you independently arrived at the same conclusion. I trust you a whole lot more than I trust me.

Could they have made it any harder?

It is time to go home.

Thanks a bunch!!!

 

[Ken Roach]

Could they have made it any harder?

We tried, but Milwaukee said we couldn't require BCD or octal for anything newer than 1988.

 

[daba]

We tried, but Milwaukee said we couldn't require BCD or octal for anything newer than 1988.

That makes 2 things that made Milwaukee famous ....

 

[The Plc Kid]

What's the other?

 

[daba]

http://en.wikipedia.org/wiki/Milwaukee#Brewing



http://www.youtube.com/watch?v=rXrvZQdgD6c

http://www.youtube.com/watch?v=g2xok1e7Hvo&feature=related

 

[todster]

http://en.wikipedia.org/wiki/Milwaukee#Brewing



http://www.youtube.com/watch?v=rXrvZQdgD6c

Apparently ole swill water hasn't made it across the pond yet or you'd be asking the same question the PLC Kid did.