Can someone explain me this piece of code ?

markopo

Member
Join Date
Aug 2009
Location
Wrzesnia
Posts
13
OPN #base
L DBW [#state_bits]
L 1
AW
L 1
<>I
JC stat

I don't get a ar1 ar2 movements and else.
Tnx
Marek

ps. I have to add that #state_bits is doubleword ??? :)
 
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Yes.

This refering to local temp variable #state_bits I understand.
In temp I have stright address to proper W in DB.

ook again

there is opened db #base
after it there is loaded word refered to temp where is address in db. ok, I get it. but in db I have DW. which word is loaded (dw 12 - w12 or w13 ??)
But with descripions if I look at this word that isn't it !! ?
You follow me ??
I don't understand a lsb and msb in combination in addressing.
For me for example if I have dw 12, so CPU loads which W in dw 12 ? w 12 or w 13 ?

next question:

after loading #state_bits there is loaded int 1 . into accu 1 ?
and w # state_bit goes to other accu ?? where
and in this place in accu 1 ? ( I suppose) is loaded int 1???
after is is proceeded AW (and word) so I filter only last (most lowest lsb) in #state_bit. right ???

then is operation L 1. where is located ??? after instriction AW.
what is checked ??? to derive JC?

<>I in known me no problems.
and jump conditional no problems.

Thank You L D[AR2,P#0.0]
 
Last edited:
DW 12 (when you mean DWORD) is B 12 13 14 15 (Or 4 bytes / 32 bit)
When you say W12 it is 12 13 (Or 2 bytes / 16 bit)


Load instruction : Loads the specific value in Accu 1
The contents of ACCU1 goes into ACCU2
So in your case State_bits goes in accu2 and "1" goes in ACCU1

<>I
Checks that the value form ACCU2 is different from the value in ACCU1
If different JC STAT

Does this helps?
 
Last edited:
Yes.

Thim right.
But if You will see correctly before instructions: for remembrance :

OPN #base
L DBW [#state_bits]
L 1
AW - And Word - no problem
L 1 - here is another loading? where is it loaded???? and
what case is to, and what is compared ?? acc1 and acc2
<>I (check is is less or more cc1)
JC stat
------------------------------------
for me its like below:
result of

L DBW [#state_bits]
L 1
AW
this operation is stored in accu 1 ? right?
and
next L 1 - as You said (result last operation goes to accu 2 and "1" goes to accu 1, and result of this operation is transfered to accu 1 ) right ?




explain me pliz :)
Marek
ps . with dw sorry my mistake ist naturally 4 bytes or 2 words :)
 
Last edited:
The L 1 after AW is loaded in Accu1
The value that was before that in Accu1 is loaded in Accu2

<>I compares the values from accu1 and Accu2

Maybe i don't fully understand the question
 
Now i will say something that i'm not 100% sure of but someone will correct me.
IF L DBW [#state_bits] is possible to be divide by 2 (0, 2, 4, 6 ...)
then you jump to stat
 
You are talking about bit shifts ? shl shr ?
can You give a reason of this ? what is background of this movement.
so if value of this #state_bits is odd ?? so what's happen ?
 
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for me its like below:
result of

L DBW [#state_bits]
L 1
AW
this operation is stored in accu 1 ? right?
?
Yep this is correct becarefull if i'm not mistake AW only changes content of ACCU1 so the value that is in accu2 (Stat_bits) is still in accu2
 
Check this
Sorry I don't know the background of this maybe someone else knows, maybe it is used for another reason i Don't know

naamloos.jpg
 
Last edited:

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