bernie_carlton
Lifetime Supporting Member + Moderator
I've done all of one whole project using the CompactLogix and the 1769-HSC and that was using a linear counter.
Now I'm trying to use a ring counter. The count cycles the way it should (up to 'max' then restarting at 'min') but the 'overflow' flag doesn't clear (at least the way I think it should) when the progrom turns on the 'overflow reset' bit. Is there any trick to this? Is there any kind of timing diagram showing the relationship of these signals? Should the 'reset' stay on while the 'overflow' bit is still on? I basically have right now:
Should this work?
Now I'm trying to use a ring counter. The count cycles the way it should (up to 'max' then restarting at 'min') but the 'overflow' flag doesn't clear (at least the way I think it should) when the progrom turns on the 'overflow reset' bit. Is there any trick to this? Is there any kind of timing diagram showing the relationship of these signals? Should the 'reset' stay on while the 'overflow' bit is still on? I basically have right now:
ring
--| overflow |---+----[ONS]---------( stuff )---
|
| ring counter
+-------------( overflow reset)-
Should this work?