Logic FBC instruction - Result Array

[TheWaterboy]

Logix 5000 v32 on 1769-L16ER

I used the FBC instruction to scan an array of DINTs for true bits and it works but I found a thing that just doesn't seem logical.

The Result Array of the FBC gets populated with the linear memory location of every true bit in the source array.

What that does is create a potential situation where the Result array needs to be 32 times bigger than the source array to prevent overflow if all bits in the source are true.
Mathematically then my 100 DINT source array requires a 3200 DINT result array to ensure no overflow can occur that will fault the PLC.

Either I am misunderstanding this instruction or there is a reason for this arrangement but why? In reality there only needs to be an array large enough for the max number of true bits you expect to be functional.. but that's a fault just waiting to happen.

 

[drbitboy]

While the .LEN attribute of the CONTROL structure (and first FBC Length parameter) is the number of bits to compare, I think the .LEN attribute of the RESULT structure (and second FBC Length parameter) limits the number of non-matching bits that can be detected. When the result.POS value reaches the result.LEN value, the instruction terminates without error, even if the the number of bits tested (control.POS) is less than the number of bits to test (control.LEN).

 

[TheWaterboy]

Ahhh yes indeed that fixes the fault condition. Still seems like a wasteful appendage to require another array like this but I guess it has a purpose somewhere.
It doesn't even populate the result array in linear order, nor does it clear it when all bits are zeroed out.
Thanks for the help.