MicroLogix 1000 fault light blinking

Could you expound on the reasoning behind this? I have seen this trick given on other threads, but never found some explanation for it. Why specifically at the end of Lad 2? And what is the output that it unlatches?




As roxusa wrote, S:5/0 being 1 indicates an overflow trap has occurred (e.g. add 1 to a 16-bit Integer that is 32,767), and the overflow trip is a minor fault that triggers a major fault, if the S5:5/0 minor fault is still 1 at the exit out of LAD 2. See the image below and the RTFM for RSLogix Micro help.


The OTU does not have to be unconditional; code could also detect the minor fault and also increment a counter (floating point, or put the OTU after the increment;)) so it can be checked how often the overflow occurs.


Personally, I set S:2/14 (see image below) when I write code that I know will cause overflows and execute the [OTU S:5/0] at the source, so any other overflows still cause a fault and I have to go fix my code. But then, I don't write code that can harm operators or controls expensive machinery.




Btw, some time ago, one of the smarter people on this forum pointed out an edge condition when STI routines are in play and that STI routine can cause an overflow trap, the STI can interrupt and run after the OTU unlatches S:5/0 on the last rung of LAD 2 but before LAD 2 exits, in which case when the STI hands control back to LAD 2, LAD 2 exits, sees the minor fault, and triggers the major fault. I'll bet it took some time and torn-out hair to chase that puppy down.


"The only thing worse than a PLC not doing what I want it to do is when it does exactly what I told it to do."

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Thanks for all the info guys, that's really good to know! I had this error one time cause my load cell was acting up, kept shooting the PSI over 5000, which caused this error on the plc side. I didn't have to add this at the time, since we replaced the load cell to get the machine back going. Good to know for the future !!!
 
Hey Folks,
I have a customer with an older machine that is controlled with a MicroLogix 1000. The machine just quit working.

The power light is on solid, the run light is off, the fault light is blinking, and the force light is off. Obviously something is not right if the fault lights is blinking and the run light is off, but what?

I'd appreciate help from all you AB fellows! Thanks!
On the program tree (left side) double click on Processor Status, then go to the Error tab and check what's wrong. In my case there were 2 bits set to 1: S 1/13 and S 5/8. I manually set the S 5/8 back to 0 and then clicked on the Clear Major Error button and that was it.
 
Just quickly passing, "as my time is in the negative", but thought I'd throw the official details out there for readers on the error that was apparently at play here...

Major Error S:6 = 34h

A negative value for a timer accumulator or a preset value was detected.
Note: Fixed processors with 24 VDC inputs only: A neg or zero HSC preset was detected in a HSC instruction.

ID: BF3388 | Access Levels: Everyone
SLC / MicroLogix controllers: error code 34h

Regards,
George
 
Just a heads-up on the last 3 posts - just to clear things up !

The S:5/0 flag is NOT the overflow flag, it is simply a flag that the code produced an Overflow, or Underflow, during the last program scan. It could have happened on rung 1, or rung nnnn.

It is called the Overflow Trap Bit, and is set whenever an instruction sets an over, or underflow status.

It is ONLY inspected at the end of the scan of file 2, and if it is set, the processor throws it's dummy (pacifier) out of the pram (walker) and will major fault.

It is the most useless piece of information you will get. You cannot tell which instruction caused the overflow, where, or anything, it just says an over or underflow occurred "somewhere".

Just to paint a picture - suppose your program has 5,158 rungs of code... and just suppose a "math overflow" occurs on rung 5, that means that some of the rest of the 5,153 rungs of code may be invalidated by that math overflow, but it will be executed anyway. Sucks.

The processor seeing the trap bit set is too late, the programmer should have been inspecting the real status bits after each instruction if they were relevant or critical.

This "Overflow Trap" bit does not exist on any other platform, just 500 series (includes Micrologix), so is/was it useful ? No, a proverbial PITA.

Just for the record, 99.9% of other peoples programs that I have seen have an OTU of S:5/0 as the last rung of file 2.


EDIT : Some posts crossed during....
 
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