OTU/OTL bits true at the same time. Should it be?

eddicuss

Member
Join Date
Oct 2021
Location
California
Posts
13
Have a noob question regarding OTL/OTU bits. Can someone look at the attached photo and tell me why both the OTL/OTU bits are true? Then they both go false when the timer expires. Is this normal? And is it possible to monitor which one is actually true through an OPC or Modbus interface?

latch.PNG
 
There are no OTL and OTU bits, there is Toggle_Bit.

Since Toggle_Timer.DN is false, Toggle_Bit is kept at TRUE and the OTU instruction displays the state of the Toggle_Bit. If it were false, the instruction would not light it up.
 
The OTL rung is true only when your input is true. When this happens the output latches and you would see the green around the OTL and OTU for your "Toggle_Bit" tag until the timer expires and the run for the OTU becomes true and the bit will unlatch. That green around the OTL and OTU is to show you that the bit is set to 1, not if the rest of the run is true.

I think this is what you getting at.

🍻
 
both the OTL/OTU bits are true?
These are not separate bits. These are the same bit, appearing in two different instructions. It becomes true when the OTL runs as a result of the input being made, and becomes false 3 seconds later when the timer finishes timing. Both OTL and OTU (and OTE) show as green if the bit they are assigned is true, so this is normal behavior.

To my knowledge you cannot monitor the state of an instruction, but examining the state of the bit should give you all the information you need since you know the logic that sets and unsets it.

NB if the input remains true longer than 3 seconds then on all further scans until it goes off Toggle_Bit will be set by the logic and then unset two rungs later, potentially yielding erroneous readings if examined asynchronously to the scan. Depending on the process, you may want to add a oneshot or otherwise avoid this condition.

EDIT: Beaten to it ;)
 
Be aware that different brands handle the representation of Latch/Unlatch instructions differently.

Any respectable PLC IDE will show the correct indication of power flow across -] [- and -]/[- instructions. But the representation of the -(L)- and -(U)- instructions themselves may vary. GE/Emerson's IDE software will highlight the instruction that corresponds to the state of the bit. So their -(S)- instruction will be highlighted when the bit is true and the -(R)- instruction will be highlighted when the bit is false.
 
This is good to know and this is what I was trying to get at in Studio 5000. It just makes more sense to me that if the bit is high, the instruction it's assigned to i.e. OTL, will be highlighted, and if it's low, the OTU instruction will be highlighted. To each their own I guess.

Thank you all for your help and clarification.
 
... Any respectable PLC IDE ...
Bwahahahahaha, as if such a unicorn exists ;).

IDE (Integrated Development Enviroment e.g. in this case Studio/RSLogix 5000, I think) programmers make choices, sometimes good ones, sometimes bad ones, sometimes ones that produce intuitive results, sometimes ones that produce counter-intuitive results.

@eddicuss, the OP, is a self-proclaimed noob. I suggest they write a minimal program that will allow them to diagnose the choices that the IDE programmers made for displaying data and/or instructions for OTU and OTL instructions. Then post the results here. E.g.

XIC latch_that_bool OTL that_bool
XIC that_bool LES that_bool_is_t_dint 2000000000 ADD that_bool_is_t_dint 1 that_bool_is_t_dint

XIc unlatch_that_bool OTU that_bool
XIO that_bool LES that_bool_is_f_dint 2000000000 ADD that_bool_is_f_dint 1 that_bool_is_f_dint

BST XIC latch_that_bool XIO last_latch_that_bool NXB XIO latch_that_bool XIC last_latch_that_bool NXB XIC unlatch_that_bool XIO last_unlatch_that_bl NXB XIO unlatch_that_bool XIC last_unlatch_that_bl BND BST CLR that_bool_is_t_dint NXB CLR that_bool_is_f_dint BND
XIC latch_that_bool OTE last_latch_that_bool
XIC unlatch_that_bool OTE last_unlatch_that_bl



 
Last edited:

Similar Topics

Good morning all, I'll preface this by saying I've been an electrical tech for about 10 years, but just started doing programming in the last two...
Replies
13
Views
2,825
I am a beginner at RSLogix 5000 and in ladder logic in general. I am tasked with making sense of an existing program and reprogramming it to make...
Replies
8
Views
6,055
I have Control Logix 5000, rel16: Is it ok to have one output latch and several output unlatches for the same address in multiple routines in a...
Replies
43
Views
8,687
I want to alternate two pumps daily based on the processor clock. When the clock is at the correct time, I set a bit to increment a counter. I use...
Replies
18
Views
5,093
Why is it that I can use multiple instances of an otl for a bit.... and the code works just as I planned it, yet... I can't use multiple instances...
Replies
8
Views
5,027
Back
Top Bottom