PLC scan times

college boy

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Hi please can anyone help.

A PLC system has an input filter delay of 6ms, relay outputs with a quoted delay of 10ms and, when monitored, the program scan times are 15ms minimum and 35ms maximum.
for a given input change calculate the best and worst case response for an output directly controlled by that input.
 
What a great homework exercise; a little under-constrained as the brand of PLC may not be known, but it does address some important aspects of PLC operation.

PLCs are about time. You will have to make some assumptions, which assumptions should be stated in your answer, about when various events happen in a PLC program scan cycle:

  • Say the start of a program scan cycle occurs at time t=0ms
    • Then, from the problem statement, the end of a scan cycle occurs at somewhere between time t=15ms and t=35ms
  • You will have to make an assumption about the PLC I/O scan cycle, i.e. when the (discrete?) input is read by the PLC.
    • On some brands of PLC, the I/O scan cycle occurs synchronously with the program scan cycle.
      • that is, PLC inputs are read between successive program scan cycles, so the PLC input value stored in program memory and used by the program's instructions is known at the start of any one scan cycle and does not change during that scan cycle.
    • On some brands of PLC, inputs are read asynchronously with program scan cycles.
      • that is, PLC inputs may be read at any time, including while a program scan cycle is in progress, so the PLC input value stored in program memory and used by the program's instructions could change at any time.
  • In the problem statement, there is "an output directly controlled by that input."
    • You will have to assume and program at least one rung that does this.
    • Perhaps the time to execute the instructions (e.g. see this link) on that rung will affect the answer, perhaps not.
  • Similar considerations apply to PLC outputs.
I wonder if the point of the exercise is to make you aware of the distinctions, both in nature and in time, BETWEEN

  • the physical PLC input signal e.g. a high or low voltage (current?), that wired to a PLC input card terminal, and that is also measured during the PLC I/O scan cycle,
  • AND
  • the bit (bitbox*) in PLC memory that represents the state of that signal, and that may be used by any instruction during the PLC program scan cycle,
as well as similar distinctions for PLC outputs.

* I recommend watching the video series at this link; it's about 10 minutes per video and the entire series can be viewed in less than 2h.
 
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