Hello
I want to map every input/outputs to memory
First approach I did was a list copying every bit
but the code was too big.. Then I decide to use Marks
An idea for doing this is using marks in same Order than memory
(and simbols names similars in memory as i/o)
So it can be achieve with a very short code
But, it requires to define memory bits symbols in exact same order than i/o that's difficult to mantain.
Then I got some question about all this,
1. I know mapping I/O to memory would seem unnecesary because scan cycle ensure to do that anyway, but to knowexactly where real I/O are used(in a unique place) that can have in a single block"general" condition for every I/O really worth for me, what do you think?
2. Marks let do that kind of things, if I couldn't move by 4 bytes at a time, the screen would be filled with
(the advantage of this approachs is that I haven't to keep the order) and can even use DB.. Can it be done with DB?
3. Could this be done in STL? The most "flexible" approach I have in mind is to do it with metaprogramming, to make a software (c++/java/etc..) so I would give it the list of I/O, and it will generate the code in STL or AWL for doing the buffer asignation. (It's a weird solution, but will work till siemens do something better.. )
4. What are other advantages of using Marks instead of DB? is there any speed/volatileness issue? what about instance or global DB, have any performance difference?
Thank you for your opinion.
I want to map every input/outputs to memory
First approach I did was a list copying every bit
but the code was too big.. Then I decide to use Marks
Code:
real input TO memory (for example E0.0 to M0.0)
real output TO memory (for example A0.0 to M200.0)
..work within memory (no I/O reference)
memory TO real output (for example M200.0 to A0.0)
(and simbols names similars in memory as i/o)
Code:
OUT_MOTOR_A A 0.0
OUT_MOTOR_B A 0.1
as
BUFF_MOTOR_A M 200.0
BUFF_MOTOR_B M 200.1
etc..
Code:
//real input to memory input
L ED 0
T MD 0
//real output to buffer output
L AD 0
T MD 200
//...
//... PLC CODE
//...
//buffer output to real output
L MD 200
T AD 0
Then I got some question about all this,
1. I know mapping I/O to memory would seem unnecesary because scan cycle ensure to do that anyway, but to knowexactly where real I/O are used(in a unique place) that can have in a single block"general" condition for every I/O really worth for me, what do you think?
2. Marks let do that kind of things, if I couldn't move by 4 bytes at a time, the screen would be filled with
Code:
U buffer_var
= out_var
...
3. Could this be done in STL? The most "flexible" approach I have in mind is to do it with metaprogramming, to make a software (c++/java/etc..) so I would give it the list of I/O, and it will generate the code in STL or AWL for doing the buffer asignation. (It's a weird solution, but will work till siemens do something better.. )
4. What are other advantages of using Marks instead of DB? is there any speed/volatileness issue? what about instance or global DB, have any performance difference?
Thank you for your opinion.
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