Theory Question about clearing bits...

[stanggt200220000]

I'm told its necessary to clear latch bits and sometimes timers in disabled subroutines...but why?

I'm thinking either it would mess up future runnings of the program or eventually accumulate and set off the overflow bit and crash the PLC?

 

[TConnolly]

Consider the case of the following two rungs in Ladder 2

XIC B3/0 JSR 3
XIC I:0/0 OTE O:1/0

And the following rungs in ladder 3
XIC I:0/0 OTE O:1/1
TON T4:0 1 100 0

Now imagine the program is run for the very first time.

B3/0 is off and I:0/0 is off.
What is the conditon of O:1/0? (off)
What is the conditon of O:1/1? (off)

Now imagine that B3/0 is off and I:0/0 is on.
What is the conditon of O:1/0? (on)
What is the conditon of O:1/1? (off) - because the subroutine has not been scanned, therefore the rung in ladder 3 has not been executed.

Now imagine that B3/0 is on and I:0/0 is on.
What is the conditon of O:1/0? (on)
What is the conditon of O:1/1? (on) - the rung in ladder 3 is now executing.

Now turn B3/0 off.
What is the conditon of O:1/0? (on)
What is the conditon of O:1/1? (on) - the rung in ladder 3 is not being executed, the value of O:1/1 stays in the last state.

Now turn I:0/0 off.
What is the conditon of O:1/0? (off)
What is the conditon of O:1/1? (on) - the rung in ladder 3 is not being executed, the value of O:1/1 stays in the last state - the rung is never executed to see if I:0/0 is off or on, so the value in the output image table is not changed.

Now cycle power to the PLC.
What is the conditon of O:1/0? (off)
What is the conditon of O:1/1? (on) The value in the output image table remains in the last state until ladder 3 is executed again.

If you change the first rung of ladder 2 to this:
BST XIC B3/0 NXB S:1/15 BND JSR 3
(s:1/15 is on for only the first scan after power-up/run)

Now what will be the state of O:1/1 when power is cycled if B3/0 is off and I:0/0 is off?

What do you think will happen to the timer in ladder 3 if B3/0 is on for 20 seconds and then shut off? Remember, a timer is an instruction, not a physcial device. What will be the value in T4:0.ACC sixty seconds after B3/0 is turned off? What about after even a year if B3/0 was not turned back on? (the answer is 20)

 

[stanggt200220000]

Ahhh I gotcha thanks a lot for the help and the awesome response!

 

[bernie_carlton]

Alaric - your analysis of the output state in the non-scanned routine after a power cycle may be inaccurate. I understand the pre-scan evaluates ALL rungs as false during the pre-scan then begins the program. You might try it on a real PLC. Your other concerns though are valid.

 

[TConnolly]

Thanks Bernie, I did consider that, but OTOH, if you write a 1 to an non programmed output bit in the O file it remains even after cycling. I'll run it on a processor to check what the prescan does on a SBR in the morning and make sure - you may be right if the prescan includes conditonal JSRs.

 

[jstolaruk]

In Alaric's example, all real outputs are placed in a default state of OFF when the processor is changed from PROGRAM mode to RUN mode and when the processor is cold booted and enters the RUN mode.

Change the OTEs to OTLs and the outputs states are remembered, thru powerup and from PROGRAM to RUN. No matter that the rung is not scanned in the subroutine, the output remains on.

 

[Ron Beaufort]

more fish for the kettle ...

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