Hi Preeya!
I see you have achieved much already!
You probably know this by now, but to make sure we agree.
I would start with open a new project: File/New Project... (with Create CPU)
When you make a project, all files are stored in this directory by default.
Upload hardware setting: CPU/ Hardware Settings/Upload..
(or project tree: Hardware/Upload..)
Upload data: Tools/Data Transfer
In the new window: Online/Quick Data Upload
All types are checked by default.
NB1: PCD2.M170 have end adress 4095 for the type Registers, not 16383.
NB2: Datablocks are user defined. It uploads only DB's found.
Save the uploaded data to a file.
Now you have a complete backup of your system.
The *.UPL file has to be disassembled before it is readable: Tools/Disassembler..
Check:
Output Destination: Disassemble to files,
Output Format: Source (.dsr)
File Generation: Block types in separate modules
Import the files to the project. In the project tree: right click on Program Files ->Add Files.
Files of type: Disassembled Files
Mark all .dsr files and import them into the project.
And now the fun starts....
Even if the program was well documentet with a lot of comments, symbols, graphic boxes, FUPLA, ladder etc, it's now statement list without any comments.
To find where the analog reading take place, search for the base address where the modul is placed. 0,16,32,48 etc. All reading on the card use the base address, but with different channel number (0-3 or 0-7) when it activates the AD.
The kode for analog reading should include something like this: (card depended)
BITI 10 / BITI 12 / BITIR 12
"Baseaddress"
R nnnn
R nnnn is where the raw value is putted, if there isn't used a X: BITIX / BITIRX. Then it is indexed...