Is there any diffrence in cycle

jcp

Member
Join Date
Feb 2010
Location
Multan
Posts
369
Hi;
is there any diffrence in execuation cycle between rsllogix 5000 and Ge 90-30 series?
i mean rslogix have a task--programme-- routine.
while ge _main -- sub routiens.
i want to ask is ge also update the tables or bits at the end of each cycle?
Please i want to understand that becuase i want that the rung is placed on their exact place.
Reagrds
 
HUM.... what would the diffrence make are you trying to run the same program on two different plcs?
 
Hi;
i say to sorry i never work on SLC. I have some experience on control logix. if any article about the diffrence between these two i appriciate or kindly expalin the GE 90-30 cycle?
Suppose if IN Sub routine 1 have a bit change status 0 to 1 while the scan in the middle of programme is bit related contacts change or wait to start a new scan?
Regards
 
try this link:
http://www.delmarlearning.com/samplechapters/dl_display_sampchap.aspx?isbn=0766817687&cid=12
to write your program you need to know how the plc you are going to use, scans not the difference between the two. are you just trying to learn the difference or do you have a program you are writing in one or the other?
i want to ask is ge also update the tables or bits at the end of each cycle?
Please i want to understand that becuase i want that the rung is placed on their exact place.
are you writing the program for the ge[90-30 a plc]? and curently using rslogix 5000 [a software]? if so one is a programing software and one is a plc
I have some experience on control logix
sorry didnt see this before i posted.
if you know how the control logix scans the link above should help explain the ge 90-30
 
Last edited:
Chapter 2 of GFK-0467m describes the scan sequence of the 90-30 CPU. It is the traditonal sequence, read the input modules, solve the ladder logic, write to the output modules, programmer communications, internal housekeeping tasks. Repeat.

When a rung of ladder logic writes a value to any memory address, the value in that address is used in susequent rung in the same scan. The state of %Q and %AQ memory is transmitted to the output modules during the write outputs portion of the cycle. The input modules are read prior to the logic solution and the state of the %I and %AI addresses remains the same throughout the logic solution.

Exceptions to the rules about the %I, %Q, %AI, and %AQ memory are when you execute a DOIO function in ladder logic.
 

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