if multiple products for multiple valves may be present at the same time, this will require a separate
model (shift register or other tool) for each line-valve.
The key word is
model: every program is a
model of something in the real world; the only real design choice is the level of fidelity. In this case, the level of fidelity is limited by pulses from the pitch prox.
Ladder or SCL does not matter; anything I do here will be in ladder because
- Ladder is fun (IMNSHO )
- I do SCL/ST-type stuff (Fortran, Python, C/C++, Javascript, Bash, blah blah blah) all day for my real job, and I don't need to waste neurons on syntax for yet another, especially one, though Turing-complete, otherwise as anemic as SCL/ST (again, IMNSHO ).
@LD provided the answer:
I was going to suggest a shift register per product on the line, when shift register = bit value for relevant pitch count then fire diverter + release shift register for next product.
The trick is to understand how a shift register works. Basically, there is an array of bits:
Code:
0000 0000 0000 0000 0000 0000 0000 0000
^ ^ ^
| | |
bit 31 bit 13 bit 0
That shows 32 bits i.e. an array of one DINT (or float, for that matter); creating an array of multiple DINTS increases the number of consecutive bits by 32 per DINT. Each bit
models (represents) a position on the main line overhead conveyor; bit 0 models the start of the conveyor, and moving to the left, each bit position
models a position offset by another 1 pitch downstream from the previous bit/position, so the array
in toto models all pitch positions on the conveyor. OP mentioned a pitch position of 130, so five DINTS would allow for a conveyor length of 159 (5*32-1), or ten for 320 bits
modeling 320 pitch position, which covers ISO's canonical (
) engineering formula "double it and add 6" with room to spare. If one line's valve is at an offset of 13 pitches from the start, then that line-valve is interested in bits 13, 12 (modeling one pitch offset upstream toward the start of the conveyor), and 14 (modeling one pitch offset downstream toward the end of the conveyor); that line does not care about the remaining 306 bits or the pitch positions modeled by them, and neither do we care because memory is cheap.
For one line-valve, we have one or more DBs* with all of the information in the
model for that line-valve:
- dint_array: array of DINTs
- bpooi: bit position offset(s) of interest
- next_bit: a bit that represents the next bit, 0 or 1, to be shifted onto the DINT array at bit position 0
- output_valve: output to operate valve for that line
- pitch_prox: the pitch prox state; same for all line-valves.
Some of those data may be global, some may be local to an instance of an FB* that implements the behavior below. Those are the data, here is the behavior we want to see:
- When a product shows up and the operator wants to direct it to this line-valve, they press the HMI button for this line-valve
- the PLC responds to that HMI button press Setting (Latching) the next_bit (for that line valve) to 1
- Normally next_bit is 0; we'll see why shortly
- On the next pitch-prox pulse,
- SHL-type instruction shifts all the bits in dint_array to the left one position, and places next_bit (1 or 0) into {dint_array, element 0, bit position 0}
- Bit position 319 is thrown away (nobody cares because it represents a position beyond the end of the conveyor)
- The bit in position 318 is moved to position 319
- The bit in position 317 is moved to position 318
- ...
- The bit in position 0 is moved to position 1
- next_bit is moved to position 0
- next_bit is Reset (Unlatched) to 0
- Bit positions {bpooi-1}, {bpooi}, and {bpooi+1} are examined,
- Here's the beef: if any one of them is a 1, then the output_valve bit is given (probably Set/Latched to) a value of 1
- Otherwise, the output_valve bit is given a value of 0
That is it.
Notes
- I am pretty sure that can all be coded in a single Function Block (FB)*, which FB is then instanced once for each line-valve.
- Instead of testing three bits inside the FB, an alternative is to not reset next_bit until three pitch prox. events have occurred, resulting in three consecutive 1 bits being pushed onto dint_array by the SHL, reduce the bpooi by 1, and only test that one bit i.e. at bpooi.
* I think that is the word, I am not fully up to date on Siemens/TIA jargon.