[S5-155U CPU948]program question about RS flip-flop and BLD operation

Hi~everyone.
First, thanks the all who reply my question.
And this is my question:
I use a RS flip flop with GSF description, like this...



and convert it to STL description, I got this:

A F5.0
S F10.0
A F6.0
R F10.0
A F10.0
= F7.0

but I can't use this to compare with that code below, and understand what's he say :

M001:A F3.2
:AN F11.5
:= F11.6
:S F11.5
:AN F3.2
:R F11.5
:A F2.6
:AN F11.1
:= F11.2
:S F11.1
:AN F2.6
:R F11.1
:A F3.1
:AN F11.0
:= F10.3
:S F11.0
:AN F3.1
:R F11.1
:A F0.2
:JC =M003

I'm sorry I can't convert it to GSF, because it write with STL at first time. Hope you can explain it, Thanks!!
And about BLD operation, it mean this in 948 manual:

BLD 0 to 255 Display generation operation for the PG:
the CPU handles the operation like a no operation

but I still don't know what's function in this code:

ON F22.3
BLD 0
O F23.1
BLD 0
A F6.2
BLD 1

Thank's your explanation, Thank you~~

'BLD' instructions in Siemens are used internally in order to tell the programming enviornment how to display a rung created in another language (if possible). They have no effect on program execution, except to take up a bit of memory.

apple,

I dont get your question?

I think BLD's are only used by the programmer...they are NOP's only used to display when you are creating the program...I think..BLD 131 is used for STL

Your CFS (not GSF) is as shown do you have a question about it?

apple said:

Hi~everyone.
First, thanks the all who reply my question.
And this is my question:
I use a RS flip flop with GSF description, like this...

and convert it to STL description, I got this:

A F5.0
S F10.0
A F6.0
R F10.0
A F10.0
= F7.0

but I can't use this to compare with that code below, and understand what's he say :

M001:A F3.2
:AN F11.5
:= F11.6
:S F11.5
:AN F3.2
:R F11.5
:A F2.6
:AN F11.1
:= F11.2
:S F11.1
:AN F2.6
:R F11.1
:A F3.1
:AN F11.0
:= F10.3
:S F11.0
:AN F3.1
:R F11.1
:A F0.2
:JC =M003

I'm sorry I can't convert it to GSF, because it write with STL at first time. Hope you can explain it, Thanks!!
And about BLD operation, it mean this in 948 manual:

BLD 0 to 255 Display generation operation for the PG:
the CPU handles the operation like a no operation

but I still don't know what's function in this code:

ON F22.3
BLD 0
O F23.1
BLD 0
A F6.2
BLD 1

Thank's your explanation, Thank you~~

Click to expand...

:A F3.2
:AN F11.5
:= F11.6
:S F11.5
:AN F3.2
:R F11.5

The above is a one shot of F 3.2 rising edge. F 11.6 is the one shot.

:A F2.6
:AN F11.1
:= F11.2
:S F11.1
:AN F2.6
:R F11.1

Is the same for F 2.6 and so on.. The latched bits are memory that the one-shots been done.

I presume this is S5, as S7 has one shot instructions.

For the ladder to STL example:

A F5.0
S F10.0
A F6.0
R F10.0
A F10.0
= F7.0

in STL, the F 7.0 would not be needed,

A F5.0
S F10.0
A F6.0
R F10.0

works OK to set and reset F 10.0, the last bit

A F10.0
= F7.0

would be used in ladder if you wanted to continue with some logic after the latch, i.e.

A F10.0
A F 12.2
= F7.0

where F 12.2 would be in series before the coil in ladder.

As for BLD instructions, these has no effect on the code, these are simply display information that the editing software uses to display in ladder, in code written in STL you would never see any.

Thanks your reply, after I study program code today. There have some question in STL statement:

AN F2.3
AN F0.5
A F10.4
A 10.0
S F10.5
R F10.0
= F8.5

I guess it mean that :



This is right or wrong....??
If it is right, I think STL statement is more flexible because you can't draw two RS Flip Flop in CSF at the same time, but hard to understand.

Thanks your explain. Thanks!!

That is correct, one bit of logic is then doing three jobs at once.

No matter which language you use the bit decisions are made on the condition of the RLO. In ladder it doesn't always allow you to put things in series due to display limitations.

In STL those four conditions combined sets or resets the RLO, the RLO is uneffected by S, R or = instructions, so once conditioned can be used to do multiple things.

When monitoring in Ladder you look at the nice green highlighted bits to know the conditions up to a certain point.

In STL you look at the status of the RLO at the right hand side (1 or 0).

The thing that makes STL more difficult to the programmer used only to ladder, is when the equivalent of parallel branches come into play, you have to then remember that the RLO may suddenly become a 1 even though the previous instruction may have been false, simply because the logic has it OR's with a previous bit of logic which was TRUE.

apple said:

This is right or wrong....??

Click to expand...

The only problem that I see..is that

A 10.0

Click to expand...

is not a valid address, that should be F or I or Q or whatever..but...it was most likley a type-o...I think Peter has over look that as well.

Other then that you are getting it... nice job

Also...

The CSF could also look like this... that way it would be a litter cleaner...



And the ladder would look like this...



STL is easier and faster to program, but ladder is better to trouble shoot for a technican.


.

Thank you!!
I type wrong word.
Thanks this for me learning more.