testing for only one bit set for two output modules

XC204

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Join Date
Nov 2007
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Geneva,Il
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I have an AB SLC 500 that I need to check two 16 bit output modules to see if there are more than 1 bit set total between the two output mod.s O:4 & O:5 no problem with the tests just the counting of bits. I was trying to use BSR but keep getting confused with what t do with the bit add.I thought I could load B3:X with the copy of O:4 and B3:Y with the copy of O:5, BSR 16 times for both ,count the UL bits,add them ,then test the result
LES than number 2 and GEQ than 2. This is in a PLC that selects multiple speaker sets in a complex if one area is selected I will output a 12 bit number to a module that I built that will boost or reduce the line signal to a 250 watt audio amp. The module allows me to program a specific gain that will be associated with indevidual areas via an input module and bcd sw's. Gain would be set to "1" if more than one area is selected. Thanks
 
Here's something I threw together, it uses indexed addressing, don't know if your processor supports it or not.

I have the addition in a sub routine that runs once per second, you may want to do it every scan.

edit:
Use the _R1 file, I forgot to account for the same bit being on in the two outputs in the first one.
 
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Thanks Ken I was stuck on BSR to the number of bits but this looks perfect. Again many Thanks I will let you know how it turnes out
 
I know that Ken's method will work. If you still want to use a Bit-Shift instruction, here is one using the BSL. It uses about 3 rungs. The first 2 rungs I put in only to set up some test data. I tested it with several combinations and it worked.
 
FBC is a useful instruciton, but here you will later still have to count up the number of mismatches between the Source and the Reference. In this particular case, you might as well do it with the BSL.
 
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Two FSC's per scan is the sweetest deal. Yes, that is the ideal instruction to use where available.

I had forgotten (again) those were in available in a SLC. Be sure to understand the options, and you can find the first bit set with the first FSC and the second with another FSC on hte next rung. Logical AND the FounD bits (series XIC instructions) and yer done.

3 Rungs, every scan.

That's how we okies 'd doit!
[/HIGHLIGHT]

EDIT: OOPS, Is it File Bit Compare? Or File Search Compare?...[RTfM-ing now]

Edit again, way wrong, one FBC in "All in one scan mode" with LEN of 2, and use GEQ, Rx.POS, 2 afterwards...sorry for the above confusion.

I need to get off here and go elf myself elsewhere, before I hurt somebody...so sorry...

http://www.elfyourself.com/?id=9618671458
 
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