Welby,
I agree with Alaric. You CAN probably find a way to dump the memory, but that will be very little help in finding a math overflow. As others have said, the memory storage gets changed constantly, and for a memory dump to mean anything, you would have to be able to dump it exactly on the same scan as the math overflow occurs.
How to do that? Oh, you just have to find the places where a math overflow might happen, then add some rungs (modify the PLC program) to capture the data. If you have to do that it is not much more trouble to go ahead and fix the problem, once it is found. The best troubleshooting tool to find a problem in a PLC program.... is the plc program itself!
That is what I meant by it will be much easier just to fix the program so that it works correctly. I understand that you are not able to do that, but there are those who can. Simply tell your boss that if the in-house gurus do not know how to do it, then he needs to bring in an outside contractor.
You can probably find someone here that is close enough to Indianapolis do the job for you. You might even get some trouble-shooting done right here online, depending on the complexity of the PLC program.
If we knew what you have (PLC, SLC, Micrologix, and so on) then someone might suggest some memory locations to look at. For example, if it is an SLC, then I think the Overflow Status bit S:0/1, the Overflow Trap bit S:5/0, and the Math Register S:13 and S:14, would all be important to dump.
32-Bit Math Special Considerations
If you are using a Series C or later 5/02, or a 5/03, 5/04, 5/05 or MicroLogix processor (capable of 32-bit addition and subtraction), you can set the math overflow bit (S:2/14) in the status file. This causes the unsigned, truncated, least significant 16 bits to remain in the destination.
If this bit is not set and an underflow or overflow conditions occurs, the operation will be the same as with a Series B processor. The destination address will contain a 32767 (if the result is positive) or -32768 (if the result is negative).
Arithmetic Status Bits
After an instruction is executed, the arithmetic status bits in the status file are updated. The arithmetic status bits are in word 0 bits 0-3 in the processor status file (S2).
This bit Description
S:0/0 Carry (C)
S:0/1 Overflow (O)
S:0/2 Zero (Z)
S:0/3 Sign (S)
Other Status Bits/Words You May Want to Monitor
This bit Description
S:5/0 Overflow Trap Bit (Minor Error Bit) If this bit is
ever set on execution of the END, TND, or REF
instruction, a major error (0020) is declared.
S:13 Math Register (Least significant word of 32-bit value)
S:14 Math Register (Most significant word of 32-bit value)
Rockwell Software 2000
