Quick Question on PLC Ladder Logic Execution

mike64b · Nov 21, 2011

I've got a AB Micrologix 1200 PLC and I've attached a picture below showing a rung with a nest. If B3:2/5 is initially cleared and we go to SBR U:7 and within that SBR I set B3:2/5, when it returns, will the JMP Q2:1 be executed next or skipped because it would re-evaluate the entire rung?

Mickey · Nov 22, 2011

I just tried it on a ML1500. I used a OTL ( output Latch) instead of a JMP instruction and it executed. The OTL latched.

mike64b · Nov 22, 2011

Mickey thanks so much for taking the time to check it out. I was worried that upon returning to the rung it would first re-evaluate the B3:2/5 XIO and if that was true do the JMP, but it seems it actually operates as I hoped!

Considering you tested this out, does that imply this rung example is not common? I hope I am not attempting things that are considered in the dark realm of ladder logic

TConnolly · Nov 22, 2011

If you ever have any doubt about how a rung will execute then double click on the rung number. The mnemonic instructions for the rung will appear. The rung will execute the instructions in exactly the order listed on the mnemonic line.

daba · Nov 22, 2011

Alaric said:
If you ever have any doubt about how a rung will execute then double click on the rung number. The mnemonic instructions for the rung will appear. The rung will execute the instructions in exactly the order listed on the mnemonic line.

I would have suggested exactly the same thing Alaric. Nice tip.

Anyone who has ever been on a Rockwell training course will have course material with diagrams that show the RET from a subroutine returning execution to the start of the next rung!

That is WRONG !! Execution continues from the right-hand side of the JSR, and if the next instruction is NXB, execution continues on the next branch down.

mike64b · Nov 22, 2011

daba said:
That is WRONG !! Execution continues from the right-hand side of the JSR, and if the next instruction is NXB, execution continues on the next branch down.

This makes sense to me... I'm glad it operates in this way as when I do a JSR I want it to return to exactly after that JSR and not do anything funny like re-run the rung.

daba · Nov 22, 2011

Complete sense is made if you treat EVERY instruction as just "an instruction" - it doesn't matter what instruction it is, the remainder of the rung will be processed as normal.....

... an exception - JMP will jump to the specified label as it is encountered, no further processing will be performed on the rung.

See the pic to understand this - there is no other reason why any_tag should not be true

mike64b · Nov 22, 2011

Yep I see what you are saying, this operation follows what I would expect since I am used to C type and assembly language programming mostly. Ladder logic is very new to me.

Edit: Another quick question.. Any reason why labels cant just be a rung on there own without an output? Is it just do to the fact all rungs must have outputs? And can a workaround just be, for the rung with a label, to latch some internal bit that is never used?

TConnolly · Nov 22, 2011

In a ControlLogix processor you can use the NOP instruction (no operation) as Daba showed. Otherwise all rungs have to terminate with an output instruction. In your Micrologix you'll need to have a work around. One good one is just what you suggested, an OTE or OTU assigned an internal bit that isn't used. However there is not any reason that you can't just proceed with whatever logic is on the next rung right after the LBL on the same rung as your work around.

Note that also in your Micrologix you can't do what Daba showed with the JMP instruction. In the Micrologix case the OTE any_tag would be required on a branch below the JMP instruction. Despite that it would be jumped and not executed as Daba explained, leaving any_tag in its last state.

daba · Nov 22, 2011

Alaric said:
In a ControlLogix processor you can use the NOP instruction (no operation) as Daba showed. Otherwise all rungs have to terminate with an output instruction. In your Micrologix you'll need to have a work around. One good one is just what you suggested, an OTE or OTU assigned an internal bit that isn't used. However there is not any reason that you can't just proceed with whatever logic is on the next rung right after the LBL on the same rung as your work around.

Note that also in your Micrologix you can't do what Daba showed with the JMP instruction. In the Micrologix case the OTE any_tag would be required on a branch below the JMP instruction. Despite that it would be jumped and not executed as Daba explained, leaving any_tag in its last state.

Should have replied in MicroLogix context - apologies

mike64b · Nov 22, 2011

Well now that I think about it, I am usually using the JMP to go to the end of an SBR and in that case I would just have the output condition as a RET on the label rung so thats not an issue.

That leaves the only issue in the main program LAD2 where if I want to jump to the end I wouldn't have anything on the output... I wonder is this an area where instead of using a JMP I would use TND to perform the I/O scan and restart the ladder scan from beginning?

daba · Nov 22, 2011

TND just acts like the end of program file, its like the processor sees the END rung. It is not normal to use a TND in the main program file, TND is a debugging tool, and shouldn't exist in a finished program.

In a subroutine, I would program an "early return" = a conditional RET instruction if I didn't need to process any more code.

In the main routine, LAD2, I would NEVER EVER program anything to stop the rest of the code executing. Doing so makes any code added "position dependant".

It sounds like you are trying to tie your logic execution to the application - let the logic solve whatever is thrown at it.

mike64b · Nov 22, 2011

So it should operate the exact same as a JMP to the end of the main ladder file then?

TConnolly · Nov 22, 2011

If you want to conditionally end a subroutine early then use the RET (return) instruction. Use with care and structure your subroutine carefully because any bits addressed by any OTE instructions after the RETurn will be left in their last state.

daba · Nov 22, 2011

check back on my previous post - i was editing while these later ones came in

Quick Question on PLC Ladder Logic Execution

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