2 out of n voting block in RSlogix 5k

With the FBC instruction, even if N is a large number, it can be solved in a single scan. If the result_control_word.POS is greater than or equal to 2, then the 2+ of N voting is true - and its simpler to program and will execute faster than calling a SBR or a loop. The CLX is blazing fast so even for large N this is going to execute in microseconds. N is not going to be millions or even thousands. N refers to IO inputs.

For ladder purists, this was my suggestion in the same MrPlc thread that Gerry refered to:
CLR BIT_COUNT
XIO BURNERS.0 ADD 1 BIT_COUNT BIT_COUNT
XIO BURNERS.1 ADD 1 BIT_COUNT BIT_COUNT
XIO BURNERS.2 ADD 1 BIT_COUNT BIT_COUNT
.
.
XIO BURNERS.8 ADD 1 BIT_COUNT BIT_COUNT
GEQ BIT_COUNT 3 OTE BURNER_ALARM

But this was for a 3+ of 9, where N is relatively small. At the time I had brain lock on and didn't think of the FBC. Gerry's suggestion is elegant and efficient.
 
Okay, so suppose the binary element "VOTERS" is made up of "n" bits. If VOTERS is a single integer then:

If VOTERS>2 or (VOTERS<0 and VOTERS>-32768) Then VOTE_PASSED=1

Right?

If VOTERS is multiple words, just parallel the compares? Isn't it that simple for 2 of "n"? If bits 0 and 1 are set then the whole number will be >= 2. If bit 15 and any other bits are set it'll pass the other test. For x of n voting it would probably get real complex ...

Am I missing something?
 
Terry Woods said:
rdrast...

If you have been around (at PLC.net) long enough... then you know that I am "the" major proponenent for Karnaugh Maps. However, in this case, although I haven't found it yet, I believe there is a way to make the determination much faster than a K-Map could.

At the very least, one could exercise a special-function program, or a sub-routine with jumps, to divide by 2 until the result consists of a quotient greater than "0" and a remainder of "1". If that occurs then, without a doubt, more than one input is ON!

However, I'm still working on trying to make this determination in a single rung.

This is an interesting problem.

I'm still waiting for Gerry to describe his method in a conceptual manner.

Terry... in a single rung, I'd love to see it <smile>

I do resort.. no, not right, I turn to the maps when I have a wierd logic problem.

True, the resultant logic is generally difficult to understand for the nest person...

Actually, my usual solution for the above problem, in anything but a logix platform (blast lack of simple indirect addressing), is a for-next loop, with an add, a bit-****, and a compare, but I've never actually needed voting type logic.
 
2 of 16 voting in a single rung

IF i understand this problem, will this work? If not, please explain.
2_of_16_voting.JPG
 
Single BIT when converted into a DATA have the a value relative to there position into this DATA.

Comparing inputs from a module, say I:1/0 to I:1/15

0000 0000 0000 0001 would be displayed has 1 in a Data-word
0000 0000 0000 1000 would be displayed has 8 in a Data-word
0000 0000 1000 0000 would be displayed has 128 in a Data-word


All these "displayed" values are from consecutive bits while only one bit is "ON".

So comparing "values" will not work.
 
Pierre said:
Single BIT when converted into a DATA have the a value relative to there position into this DATA.

Comparing inputs from a module, say I:1/0 to I:1/15

0000 0000 0000 0001 would be displayed has 1 in a Data-word
0000 0000 0000 1000 would be displayed has 8 in a Data-word
0000 0000 1000 0000 would be displayed has 128 in a Data-word


All these "displayed" values are from consecutive bits while only one bit is "ON".

So comparing "values" will not work.

Your examples show single bits. For 1 of "n", Data Word<>0 solves that. The original problem stated 2 of "n" voting. Why won't comparing work as in my example above? Couldn't that be expanded slightly to handle x of n voting? Please help me to understand why it isn't that simple?

Peter: I followed your link, and you're right that none of this hasn't been done before, but it's no fun just copying others' methods. I usually try to figure out the best/simplest/most efficient method I can on my own, then compare with what the real experts have done. I learn more that way. I just wanted to say I'm not ignoring you and respect your expertise.
 
Last edited:
Okay, bit counting ... I thought it was just a true or false test for a particular number of bits on. I wish the originator would reply.

With AB, FBC definitely can handle it, but will dumbfound most maintenance technicians.
 
Since the CLX platform supports structured text, why not use a while true or for next loop, and increment a counter if the bit is true? You woud have to set up an array that holds the input values, then index thru until the entire array has been checked or the counter has a value of 2.

Something like this.

MyCounter = 0
mode = true
while mode
IF i = True
Then MyCounter = (MyCounter +1)
IF MyCounter= 2
Then mode = false
Endif;
Else
If i < n
Then i= i+1
Else mode = false
Endif;

Endif;
Return



I know the syntax is not correct, but I'm just trying to show an idea, not the actual method.

Ken
 
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I wonder... is he looking for at least 2 out of N... or ONLY 2 out of N?

If he is looking for ONLY 2 out of N then... 3, or more, out of N would result in a failure... ie, NO.

However, the general idea behind a "voting block" is to look for a minimum number of assertions. If the minimum number is found, then the result is YES, otherwise, the result is NO.

If he is looking for ONLY 2 out of N... then all inputs have to be examined to determine if there are only 2 assertions. That means going through the whole list of inputs.

On the other hand, if he is looking for at least 2 out of N, then, he only needs to check until 2 assertions are found.

Now, it's easy, albeit long, to go through the process of checking each bit until 2 are found. If bit-1 (MSb) and bit-2 are turned on and you begin checking a 64-bit or 128-bit word from the left, at bit-63 or bit-127... then you are consuming much time to make the determination. The same applies vice-versa.

The larger the size of N, the longer it might take.

In real digital logic (hardware, assuming the hardware is designed to handle the number of "voters"), it wouldn't matter where the bits were... because all bits are examined at the same time... actually, I shouldn't say examined... I should say, all bits impose their affect at the same time. Thus developing a final result in the same time, no matter what.

So... some of my earliest works were in digital design (hardware). Digital Hardware (ie, Hardware Gates), which is NOT software-based, is about as close to real-time as you can get. It's much faster than real, physical, relay logic.

So... if we look at this "voting" thing to be as critical as the multiple-computer arrangement on the Shuttle... we should want to have the answers as quickly as possible... I should expect the answer in a handful of micro-seconds... if not nano-seconds. (Every pico-second counts in a crash & burn vs. walk-away situation!)

Of course, in a PLC there is the over-bearing weight of the program scan-time before outputs are affected. However, the longer it takes to determine the "vote", that's how much longer it takes to affect the outputs.

So... even though I might be asking for too much if this was the only time-consuming aspect in a typical industrial situation... one must remember, there are usually MANY of these types of things throughout any medium to large process. The total affect of these types of things affects the overall scan-time! They all add up! If the scan-time is affected adversely then you'll find that your pulse-counter, the one that used to work, no longer counts as accurately as it once did.

All things in a process are connected, someway, somehow. And now, now that we are using PLCs to control the process... now there's that damned timing issue called "scan-time"... don' cha know!

So... I think it is entirely reasonable to pursue the fastest way possible to make the (at least) 2 out of N determination.

Doing so can only make us better at doing what we do.

Oh.... it's already been done? It can't be done better because that would be reinventing the wheel?

If we don't keep looking for better answers... then we won't ever find better answers!
 
Pierre said:
... So comparing "values" will not work.
šŸ™ƒ

I get it now ... I can be such a dingbat sometimes! Gotta sleep more ..

... but, maybe, I can use an exponent function in an expression with OR logic that evalua...... zzz ... zzz ... zzz ..
 
So I ruined your fun.

Terry Woods said:
Oh.... it's already been done? It can't be done better because that would be reinventing the wheel?

If we don't keep looking for better answers... then we won't ever find better answers!

You can see that some people thought they could discover a better algorithm. That is why there are so many. The iterated count, sparse and dense count algorithms are obvious, but the parallel count, niffty parallel count and the MIT Hackmen count are not. My hat is off to those that invented the non obvious alogritms. If Terry discovers a better alogorithm then we can name it Terry's Bit Tally. That would be great and I would add this new algorithm to my software toolbox.

Until then this forum should not set the world back by proposings inferior or wrong algorithms.

BTW, I usually use the precomp_8 algorithm when using 8 or 16 bit micro controllers. The sparse alorithm is prefered with 32 bit processors where 32 bits can be checked each loop.
 

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