Global Counter/Timer reset

I'm running an actual processor - a 1756-L62

It's not the first time I've come across execution differences between hardware and the emulator, and because of that I would never recommend the use of the emulator to prove a project.

The "worst" I stumbled upon was that JSR parameters are passed, stacked, handled, or whatever you want to call it in the opposite order !

Our "standard" plant item or device handlers had a UDT for the device itself, and we passed that into the handling subroutine first, then we would pass the plant item feedback signals from the I/O into the relevant UDT members for processing. (This was, of course, pre-AOI days).

Passing the parameters in that order was perfect in an actual processor, but not in the emulator, the net result of the way they passed parameters to subroutines was that the data already in the UDT would override the I/O data passed "later".

When I complained about this mishandling of JSR parameters to RA, I got the response along the lines of "...The Emulator is a cut-down version of SoftLogix, and the developers of that were not given a specification to work to...." - I thought that was a lame excuse for a huge blunder.
 
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I'm running an actual processor - a 1756-L62

It's not the first time I've come across execution differences between hardware and the emulator, and because of that I would never recommend the use of the emulator to prove a project.

The "worst" I stumbled upon was that JSR parameters are passed, stacked, handled, or whatever you want to call it in the opposite order !

Our "standard" plant item or device handlers had a UDT for the device itself, and we passed that into the handling subroutine first, then we would pass the plant item feedback signals from the I/O into the relevant UDT members for processing. (This was, of course, pre-AOI days).

Passing the parameters in that order was perfect in an actual processor, but not in the emulator, the net result of the way they passed parameters to subroutines was that the data already in the UDT would override the I/O data passed "later".

When I complained about this mishandling of JSR parameters to RA, I got the response along the lines of "...The Emulator is a cut-down version of SoftLogix, and the developers of that were not given a specification to work to...." - I thought that was a lame excuse for a huge blunder.

Agreed. Another one is the handling of FOR-NEXT loops. In Emulator upon exit of a FOR-NEXT loop it adds one more to the Index value...In a real processor it does not. When I brought this up to RA, I received the same response....two different development groups and coders.

Oh well....It was an interesting exercise. I would never use an FLL for a timer anyway, but sometimes it's fun to explore the way unusual instructions are handled. Thanks for the info.
 
Agreed. Another one is the handling of FOR-NEXT loops. In Emulator upon exit of a FOR-NEXT loop it adds one more to the Index value...In a real processor it does not. When I brought this up to RA, I received the same response....two different development groups and coders.

Oh well....It was an interesting exercise. I would never use an FLL for a timer anyway, but sometimes it's fun to explore the way unusual instructions are handled. Thanks for the info.

I strongly maintain they cannot call it an "emulator" at all, since it doesn't actually emulate the hardware - in effect, it's a pretty useless "tool", unless you just want to test some particular algorithm.... But re-test it on the real processor when you implement your already tested code !!

And, of course, this brings up the question of replacing a SoftLogix application with a hardware processor, or vice-versa. The two products are not as compatible as they should be.....

I cannot believe that RA would undertake the development of SoftLogix without giving the developers precise specifications of how the instructions must operate, that's a given, surely ?!?
 
execution differences between hardware and the emulator

That's disastrous!

Surely PLC Manufacturers have test automation in place that ensures each of the standard function blocks operate the same regardless of execution environment, unless it is a documented feature!

Does anyone know if the upcoming CompactLogix 5480 runs the emulate code or the ControlLogix code?
 
Does anyone know if the upcoming CompactLogix 5480 runs the emulate code or the ControlLogix code?

I believe the hardware platforms have always, and will always use the same hardware core code, obviously further developed for the new hardware. At least the firmware developers have kept a firm grip on making things forward compatible whenever possible, allowing them to sell newer faster processors to people who want to upgrade older hardware

Since I never use the emulator, I cannot say what its development cycle has been, I assume it was upgraded for new versions of Windows, but don't know what additional releases there have been... robertmee might know more...
 
RSLogix5000 Studio Emulate is available for ver 24 and 28, which presumable supports Windows 10. I'm using Ver 20 and 24 on a Win 7 VM without any software issues. Obviously there are actual runtime anomolies as noted above, however.
 
RSLogix5000 Studio Emulate is available for ver 24 and 28, which presumable supports Windows 10. I'm using Ver 20 and 24 on a Win 7 VM without any software issues. Obviously there are actual runtime anomolies as noted above, however.

Am I right in thinking V24 was for Windows 7, then 28 for W10 ?

If I am right, then it is obvious they are doing no interim development like they do for hardware...
 
There is a TONR (TON with RESET) instruction that is not available in LADDER.

I have attached an AOI I have just written to accomplish this in ladder - should be self-explanatory....
 
Great, well done Sir

Thank you

+1 daba

n.p.

I think it may need a "pre-scan" routine as well, to comply with a standard TON. It will contain the same logic as the "Enable-In False" routine

Edit : Done...
 
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