LAD & SCL Execution times

sparkysliderz

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Hi guys, I wonder if I can have some input on this query please.

I am trying to translate code from LAD to SCL, ultimately to reduce the scan time of the PLC.

As a "test" I have carried out a "rough" translation from an existing FC in some software from LAD to SCL.
Only 5 networks in LAD Occupying 150bytes.
However I was surprised to see that in the Simatic manager after the translation, it appears that suddenly my FC had doubled in size! Now it's 340bytes!
At most I expected to see it the same size as I had not even tried to make the software run better or faster.

Is it correct to assume that the more processing memory that the FC occupies, the slower the scan of the PLC will be?

Thanks in advance guys.
 
sparkysliderz said:
Only 5 networks in LAD Occupying 150bytes.
However I was surprised to see that in the Simatic manager after the translation, it appears that suddenly my FC had doubled in size! Now it's 340bytes!
At most I expected to see it the same size as I had not even tried to make the software run better or faster.

Is it correct to assume that the more processing memory that the FC occupies, the slower the scan of the PLC will be?
Usually less code means it will run faster. If your FC does not have a loop then less code means means it will run faster. Some compilers will 'unroll' loops. Unrolling means the code in a loop is repeated instead of being put in a loop. This avoids the overhead of the looping at the expense of more code. The optimizing compilers do have a limit on how much bigger the resulting code can be. My DSP compiler will often replace calls to subroutines with in-line code to avoid the overhead of a function call. I doubt the SCL compiler is this sophisticated. I know ours isn't.

In you case I think the SCL code is not optimized. You should be able to look at both the LAD and SCL in STL and compare. I like to check the output of compilers and compare it to what I write in SCL or assembly language. I know ours ST compiler generates code that is only about 10% larger than what I can do by hand.

Compare the STL output of the LAD and SCL compilers. It would be interesting to know the results. Does STL have compiler options that govern how much optimizing the compiler does? My first thought is that the SCL compiler is not that good. Writing an optimizing SCL or ST compiler is not easy, but I don't see how the generated code could be twice as big. I know because we are writing a ST compiler now.
 
... if you're talking about work memory, sure... more instructions eat more cpu time ...

... but, maybe you should understand the meaning of high-level programming language and low-level .... high always mean ability to create easy-good-looking-code which must not be well optimized -> more complexive == slower .... low-level is straight, can look really ugly, but saves lot of space and basicly is efficient for cpu...

now, with the help of S7 manual :

The programming language SCL (Structured Control Language) is available as an optional package. This is a high-level text-based language whose global language definition conforms to IEC 1131-3. The language closely resembles PASCAL and, other than in STL, simplifies the programming of loops and conditional branches due to its high-level language commands, for example. SCL is therefore suitable for calculating equations, complex optimization algorithms, or the management of large data volume.

i also suggest to try your ladders view in STL for more experience, than you may understand the difference between same-thing-doing-code in different languages
 
OK, thanks for your thoughts on this subject,
Now leaving myself wide open to critisism here I have posted my translated and untested FC1 in SCL and a duplicate of the of the original LAD code FC2, together with a pic of the Simatic manager details.
 
sparkysliderz said:

I am trying to translate code from LAD to SCL, ultimately to reduce the scan time of the PLC.

What made you think that SCL would reduce the scan time ?

What is your current scan time and what is your target scan time ?
 
sparkysliderz said:
I have resurrected this project http://www.plctalk.net/qanda/showthread.php?p=105021#post105021

ultimately this is where I want to end up, and now I have SCL I thought it would be “easier” 🤞🏻

I wouldn't go down the SCL route for this type of processing - I'd use STL. If you persist however, remember to plan to throw away your first implementation and then do it again when you are an expert in this design (if you don't, you'll spend the same time turning your first attempt into a rats nest that eventually works)
 
Peter Nachtwey said:
I would think SCL should be faster because the PLC does not need to waste time saving intermediate results and keep track of rung status.

SCL does use additional memory for saving intermediate results and does all execution errors checking. This is only "hidden" from your eyes as you can't see STL code generated from SCL source.
SCL offers a lot of advantages but fast and compact code isn't one of them.
BTW, try to open FC or FB generated with the SCL compiler on a machine with Step7 without SCL package installed.
 
Correct me If I am wrong...

How does conversion from LAD to STL /SCL affect execution time? Ultimately all the code would be converted to machine code by the CPU Operating System right? LAD /SCL /STL are just editors for the programmers.. so that they can use which ever is suitable for them?
 
Hi Tomsci.

You could have asked in a similar way (for PCs in stead of PLCs): "How does writing programs in C++ (*) affect execution time. Ultimately all the code would be converted to machine code by the CPU Operating System right?"

I think you get the idea.

*: In stead of C++, insert your favourite higher level language of choice.
 
Tomsci said:
Correct me If I am wrong...

How does conversion from LAD to STL /SCL affect execution time? Ultimately all the code would be converted to machine code by the CPU Operating System right? LAD /SCL /STL are just editors for the programmers.. so that they can use which ever is suitable for them?

In the example I have given I was not trying to write code that executed faster but merely to compare the size of the same block written in 2 different styles.

However I think that if a block is written in SCL then the structure of the software can be written in a short and concise manner

 
Tomsci said:
Correct me If I am wrong...

How does conversion from LAD to STL /SCL affect execution time? Ultimately all the code would be converted to machine code by the CPU Operating System right? LAD /SCL /STL are just editors for the programmers.. so that they can use which ever is suitable for them?

But, even the compiled machine code includes the extra instructions used to display the code in ladder. Unless you are using mainly simple boolean logic, an STL project will have about 40% less instructions (and hence a 40% lower scan time) than the equivelent ladder project. This doesn't even include the shorter development time.

Sparky, one thing to keep in mind when comparing block sizes is that it really isn't an indicator of anything at all. In fact, I have some FBs that are identical in every way when it comes to the number and type of instructions, but the displayed block size is double for one block. Very strange.
 

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