Reverse bit order in a word? Controllogix

[PLCDontUQuitOnMe]

Say I want to reverse the bit order of an int in Controllogix...how do I go about this, other than making 16 rungs to individually check each bit and move it into the opposite bit?

I can't seem to use indirect addressing like I did with the SLCs. I was thinking 2 counters in a loop, one a CTU and one a CTD, using the ACC values of each and a move instruction addressed like so...

Mov

Forwards.(CountUP.ACC)
Reverse.(CountDownACC)

However that doesn't work.

SWPB doesn't work as it swapes bytes, but I need the actual bits swapped...IE:

1101 0000 0100 1010 to
0101 0010 0000 1011

Is there an easy way to do this because I would think there would be? Or do I just have to bite the bullet and check each bit one at a time?

For the curious, I'm trying to move a counter's ACC value into a 16 point output module. To make a visual representation of a binary counter. However the outputs module's outputs are arranged left to right ascending IE: 0 1 2 3 4..... and the integer i'm moving into it is the opposite, 15 14 13 12....

 

[doug2]

I cant think of an instruction at the moment but you can create 16 tags that alias the 16 bits that you want to reverse. No logic required.

 

[CowDung]

It sure seems like there ought to be a way to do it--but I'm coming up blank...

The Bit Field Distribute will get you there, but you still have to do each bit individually...

 

[jimbo3123]

I wish I could think of a solution as well, but I'm also drawing a blank.

It sounds to me like the easiest way is to check each bit, especially considering that there are only 16 of them.

On the bright side, checking each bit can be done in 4 simple rungs that someone in the future can easily troubleshoot. I doubt that the same can be said about most any other solution that may seem more elegant now.

 

[TConnolly]

There is a name for what your are struggling with. Its called endianness. Its something that is encountered when a motorola processor talks to an intel processor, such as a PLC5 to to a ControlLogix, or when a Mac runs a Win APP in a virtual Win machine. Usually the OS takes care of this automatically.

But for what you are doing, in a PLC the easiest to understand would be to create rungs with the acc bits as input conditons and corresponding outputs.

There are a number of bit hacks that will reverse the order of bits, but programming them conveniently in ladder is more effort than its probably worth - but if you are so inclined, click here.

When performing indirect addressing in the CLX you are allowed to enter an expression for the indirect address. This makes things very simple if you want to use a loop.

edit: I just spotted a bug in the above. The loop needs to be restructured so that the LES POINTER 16 comparrison is right before the JMP, otherwise the rung will evaluate false and clear bit REVERSE.[15-16] when Pointer=16 which will be bit REVERSE.-1 which won't be good.

LBL WHILE_LOOP BST XIC COUNTER.ACC.[POINTER] OTE REVERSED.[15-POINTER] NXB ADD POINTER 1 POINTER LES POINTER 16 JMP WHILE_LOOP

 

[robertmee]

I always hated going between TI and AB. 16 to 1 vs 0 to 15. Not only reversed, but no zero bit. Throw in the occassional PLC 5 w/ octal addressing and let the fun begin.

 

[Dua Anjing]

Try going between Ti and S7. Not only are the bits reversed but S7 swaps the bytes also!

 

[Doug-P]

I guess you could jigger up a BSL feeding a BSR (or vice versa) and trigger it sixteen times.

 

[PLCDontUQuitOnMe]

Thanks for the responses!

Alaric: I implemented your simple but brilliant code and it works perfectly. Now I know how to use indirect addressing with a CLX.
The old code I had was just like you suggested, 16 rungs with ACC bits going to temp bits, which are then all moved into the output module.

When I put your new code in I put it above the old and made two jumps. One to go around the new code, and one to go around the old. Then I put a toggle bit with opposite examinations in front of each jump so I could toggle between the two methods.

What I found surprised me. The new, elegant, two rung solution was 2 1/2 times slower than the old, brute force, 17 rung method. Why is this?

My scan time is 200 us with the old code and 500 us with the new(your implementation).

Do the CLR, ADD, LES, and JMP instructions take THAT much more time to execute rather than simple XIC, OLE, and a single MOV?

 

[Mark Buskell]

Actually, it can be done very simply using 3 rungs.

See the attached code.

I got to thinking about how I could do this in Visual Basic and then figured out how to write ladder code for it.

Its basically counting up from 0 to 15 in 1 block and counting down from 15 to 0 in another block.

I tested it in the simulation and it worked fine.

 

[bernie_carlton]

Indirects references - especially calculated indirect references - take up a LOT OF TIME. Spend some time with an instruction timing table and it will open your eyes.

 

[Mark Buskell]

Indirects references - especially calculated indirect references - take up a LOT OF TIME. Spend some time with an instruction timing table and it will open your eyes.

I agree with your statement but there are things you can do.
An example could be triggering MGS blocks.
You could add a flasher timer or put them in a periodic routine.

 

[jtn]

I like the aliasing idea. Just be sure to comment somewhere on what and why it is being done so someone in the future will be able to figure it out. I'd be interested in seeing how the aliasing increases processor time compared to the 16 XIO's & OTE's.

 

[PLCDontUQuitOnMe]

Indirects references - especially calculated indirect references - take up a LOT OF TIME. Spend some time with an instruction timing table and it will open your eyes.

What is an instruction timing table and where do I find one/it?

 

[bernie_carlton]

I am referring to a table which gives the time to execute each instruction. While the SLC5600 and Micrologix had them in the manuals I haven't located one for ControlLogix yet.