Simple Single Button Latch/Unlatch "Circuit"?

[rootboy]

How's this?

 

[Pete.S.]

I think this will work. It depends a little on when the outputs are actually set. I don't program AB much so I'm not sure.

*** Toggle output
     Pushb       outp                   outp
-----[ONS]---+---]/[--------------------(OTL)---
             +  
             +   outp                   outp
             +---] [--------------------(OTU)---

*** Reset (unlatch) for e-stop and what not
     E-stop                             outp
------] [-------------------------------(OTU)---

 

[Tharon]

I think this will work. It depends a little on when the outputs are actually set. I don't program AB much so I'm not sure.

*** Toggle output
     Pushb       outp                   outp
-----[ONS]---+---]/[--------------------(OTL)---
             +  
             +   outp                   outp
             +---] [--------------------(OTU)---

*** Reset (unlatch) for e-stop and what not
     E-stop                             outp
------] [-------------------------------(OTU)---

In that logic, I believe that outp would unlatched as soon as it scanned the branch below after latching it. I don't believe it would work.

 

[Ron Beaufort]

more than you really wanted to know ...

from a purely academic standpoint, the basic "flip/flop" or "toggle circuit" is often assigned to beginning students - with the primary objective of making them think through the processor's scan cycle Step-By-Step ...

so ...

if anyone is interested in seeing the thought pattern laid out in gruesome detail - here is a link that should prove interesting ...

http://www.plctalk.net/qanda/showthread.php?p=427567&postcount=1

TIP: pack a lunch ... the PDF attachment uses 346 steps to explain the scan-by-scan sequence of operation ...

party on ...

 

[Doug-P]

In that logic, I believe that outp would unlatched as soon as it scanned the branch below after latching it. I don't believe it would work.

You are correct. I tested it on the micro starter and it does exactly as you describe. I tried to put a telltale latch in a branch between the outp pair to prove this but the Logix is being contrary so I gave up.

I'm sure the answer is out there.

 

[osmanmom]

post #16 i think it will not work

 

[rootboy]

post #16 i think it will not work

Funny. I tested it out last night on my PLC at work. It works perfectly there.

Are you sure your PLC is in RUN mode? ;>

 

[ndzied1]

There is hope yet

I found this picture when going through our kids High School. Someone is teaching boolean algebra and things like K-Maps.

http://www.plctalk.net/qanda/attachment.php?attachmentid=44243&stc=1&d=1493926266

 

[Pete.S.]

In that logic, I believe that outp would unlatched as soon as it scanned the branch below after latching it. I don't believe it would work.

You are probably right then.
Might be easier with the one below as this will probably be easier to translate to more PLCs as well.

*** One shot temporary bit 
     Pushb                                  temp
-----[ONS]----------------------------------( )---             

*** Toggle output 
*** or reset for E-stop (normally high)

      temp      outp        E-stop          outp
------] [-------]/[----+-----]/[------------( )---
                       +                       
      temp      outp   + 
------]/[-------] [----+

I'm more in favor though of making it into a function block called toggle. Same function but it would be easier to read and understand the ladder - doesn't require much detective work.

                +---------------+
                |     Toggle    |
    Pushb       |               |
----] [---------|input          |
                |               |
                | output: outp  |
    E-Stop      |               |
----]/[---------|reset          |
                +---------------+

 

[barrywaters]

Great Explanation

from a purely academic standpoint, the basic "flip/flop" or "toggle circuit" is often assigned to beginning students - with the primary objective of making them think through the processor's scan cycle Step-By-Step ...

so ...

if anyone is interested in seeing the thought pattern laid out in gruesome detail - here is a link that should prove interesting ...

http://www.plctalk.net/qanda/showthread.php?p=427567&postcount=1

TIP: pack a lunch ... the PDF attachment uses 346 steps to explain the scan-by-scan sequence of operation ...

party on ...

Ron, that was a great breakdown of order of execution and how the scan works.

I have two questions - If Branch B had another branch level - would this execute and update bit status before analyzing Branch C?

Also, I notice how you did not give the status of the lamp until the very end of the scan - does this mean even though the bit status of O:6/0 is 1, the local output is not updated until the end of the scan and if so, does this mean in theory that it is possible for an output bit to be toggled on and off in a single scan without ever turning on its real world counterpart?

 

[Ron Beaufort]

Greetings Barry ...

regarding your questions:

If Branch B had another branch level - would this execute and update bit status before analyzing Branch C?

if I understand your question correctly – then the answer is yes ... but you might want to post a sketch of what you're asking just to make sure that we're thinking along the same lines ...

Also, I notice how you did not give the status of the lamp until the very end of the scan - does this mean even though the bit status of O:6/0 is 1, the local output is not updated until the end of the scan

in simplest terms – the answer is "yes" ...

but ...

getting technical - it really depends on the type of processor being used ...

the OP seems to be using an Allen-Bradley MicroLogix 1500 – and the processor that I used in my analysis was an Allen-Bradley system along the same lines – specifically, one programmed using RSLogix500 - or maybe even RSLogix5 software ...

but ...

for the newer ControlLogix and CompactLogix systems (which are programmed using RSLogix/Studio 5000 software) the same "simple" answer wouldn't quite cut it ... because for those systems the status of the output bit/box can be sent to the output module at ANY point during the scan of the ladder logic – specifically, not just at the END of the ladder logic ... in simple terms, the newer systems don't have the same "under the hood" operation as the old-faithful platforms ...

and if so, does this mean in theory that it is possible for an output bit to be toggled on and off in a single scan without ever turning on its real world counterpart?

yes, it's completely possible – and not just in "theory" – but also in "reality" ...

if you'd like to read more about this subject, check out the Email Quizzes on my website – specifically, Quiz #110 ... download the PDF file for the Questions – and give it your best shot ... and then download the separate PDF file for the Answers and see if you came up with the right solutions for the SLC-500, for the PLC-5, and for the ControlLogix platforms ...

you can find the quizzes on the same page as the Sample Lessons and Videos – just scroll down a little bit past the videos to find the link ...

party on ...

 

[Doug-P]

Also, I notice how you did not give the status of the lamp until the very end of the scan - does this mean even though the bit status of O:6/0 is 1, the local output is not updated until the end of the scan and if so, does this mean in theory that it is possible for an output bit to be toggled on and off in a single scan without ever turning on its real world counterpart?

Yes, this is what happens in the logic in post #18.