Bob...
After looking again at your ladder image, I now see that PE-2 is used to activate the bit-shift.
When PE-3 comes on, you look at bit-7 in the register. If bit-7 indicates NO-GOOD then you eject the lid. The ejector is on only for as long as the lid is in front of PE-3 AND bit-7 = NO-GOOD.
Now... consider this...
A lid trips PE-3. Bit-7 is NO-GOOD. At the same time, a lid leaves inspection and trips PE-2. Bit-7 might, or might not, indicate NO-GOOD. In any case, the evaluation in bit-7 no longer relates to the lid in front of the ejector. If the new value is GOOD then the ejector is on for a very, very short time. The lid might, or might not, be ejected.
You said that you wanted a fool-proof system. That method will not provide it.
The problem with this design is that you are trying to employ an index-type response to a free-running system. At the rate you mentioned (125 ppm = 2.08333... parts per second), I wonder if you can guarantee, not only that the gaps exist, but that they are also consistent in their relationship to the bit-register. You are trying to impose a synchronized response on a marginally synchronized system.
In general, there are three types of shift registers; FIFO, LIFO and BACKFILL (or Drop-Through).
If you want fool-proof, use the BACKFILL (Drop-Through) scheme.
This particular method allows for intelligent sorting of multiple classes of items. For example, sorting by quality, color, size,...
The basic idea is that the inspection station loads an evaluation at the first available slot... starting from the bottom. The inspection station then "backfills" the register. When an item arrives at the ejection or sorting station, the program looks in the bottom register to determine the course of action. Once the action is determined, the register is shifted down and the bottom element is shifted out to the bit-bucket, or, in this case, the word-bucket (trash).
Loading and unloading of the register is co-ordinated so that the inspection station can load an evaluation in the same scan while the ejector unloads the register.
The unloading sequence (shifting) is initiated by the PE at the ejection station. The loading sequence is initiated by the inspection station.
In this scheme, the downline ejector station eye controls the shifting of the register. The upline inspection station uses indirect or indexed addressing for loading the register. The next location available to the inspection station is calculated based on previous actions. Everytime there is a loading action, the "next" pointer is decremented. Everytime there is an unloading action the "next" pointer is incremented.
There are only two requirements:
1. The register can be any size as long as it is at least as large as the maximum number of items between the inspection and ejection station.
2. There MUST be a detectable gap between items. The gap size can be any size, however, it must be detectable.
Is this "over-kill"?
Nope! As long as the requirements are met, it is fool-proof.