ControlLogix PLC/SLC Mapping of Timers

[Archie]

Is this even possible? I was trying to read a SLC mapped Timer ACC over DF1 (PCCC) and I get an Illegal address. My thought is maybe it doesn't work because the SLC used INT for timers and CLX uses DINT, therefore they do not align.

I did an N7 equivalent and it works, so I know all of the coms and mappings are working correctly.