mass subtract of integer files

Fourpaw

Member
Join Date
Mar 2007
Location
Florida
Posts
54
Hey folks,

I want to be able to do a mass subtract of integer files...

N10 (length of 110)
- (minus)
N12 (length of 110)
= (move to)
N13 (length of 110)

Then I want to compare every value in N13 to N14:0 (tolerance setput) for pass/ fail.

Is there a way to do this with a Micrologix 1200 without using 110 subtract blocks?

Thanks,
4
 
Indirect addressing would work if the 1200 supports it. (I've never used one so I can't say for certain)
N10:[N7:0] - N12:[N7:0] = N13:[N7:0]
N13[N7:0] < N14:0 OTE B3/[N7:0]

you'd also need some logic to increment N7:0 and a goto statement to keep looping through it, and make certain you can't get stuck in the loop.

So, its possible but don't expect an electrician to follow it without good documentation.
 
As hd_coop s suggested, indirect addressing is one way to do it.

See the attached for an indirect addressing example of how to do the subtraction using a FOR/NEXT loop. Just add a branch and add a compare using the same example.

Keep in mind that this method only saves the programmer work. Because of the large amount of overhead associated with indirect addressing and looping and the need for two math operations each loop it will actually execute quite a bit slower than 110 rungs would.

To quickly create 110 rungs you could use Excel and its auto fill feature to create the logic for the 110 rungs with the sub and a branch with the compare and import it as a lib file.

eg, put the following into individual excell cells in one row.

SOR BST SUB N10:0 N12:0 N13:0 NXB LEQ N13:0 N14:0 OTE B15/0 BND EOR

Highlight the row and then grab the corner and drag it down 110 rows to auto fill the rows. Excel will increment AB PLC addresses as it auto fills. Then export it to a text file, edit it to make a LIB file, and then import it into the PLC program. Viola, 110 rungs in half the time. (OK the first time you do this its not half the time, but after that you'll be able to do it much faster)
 
If

I've never used a Micrologix but, if the FAL instruction is supported it'd make life a lot easier.

Failing that, INDEXED addressing, if supported could also be a way to get there. You'd still need a loop structure but indexed addressing executes marginally faster than indirection (on a PLC-5/40).

ex. Preload the index register with 110. Next line has a label and the indexed subtract/move, indicated by the '#' sign. Next, decrement (subtract one from) the index register (S:24 in PLC-5 and SLC products) and if it's EQU zero you're done, else JMP back to the LBL and do more.

You could also incorporate the compare into this loop and break out at any time if a condition is met (assuming I correctly understand what you're trying to do).

YMMV
 
You didn't say if this operation needed to be completed in a single scan cycle or if it could be done over multiple scans. The advantage to multiple scans is you don't need to worry about jumps and loops and your watchdog timers. What you could do is:

[Some condition to trigger the subs/compares] [GRT N7:0 110] [MOV 0 N7:0]
[LES N7:0 111] [SUB N10:[N7:0] N12:[N7:0] N13:[N7:0]]
[LES N7:0 111] [LES N13:[N7:0] N14:0] [OTL B3/[N7:0]]
[LES N7:0 111] [ADD 1 N7:0 N7:0]
[EQU N7:0 111] [OTE seq_complete]

N7:0 would increment every scan cycle until it hit 111, when it resets to 0 the whole thing runs again.
 
I think the potential confusion of indexed addressing, is not worth the marginal gain over indexed.
Now that's confusing!

Just kidding Ken, I know that you meant indirect. :D

Yes, indexed addressing may be confusing, but IMHO that's only because it's not used nearly as often as indirection and, therefore, isn't as well known (more's the pity). I believe copious documentation could help with that. A more intimate knowledge of the processor wouldn't hurt anybody either.

I was just pointing out another option.
 

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