PLC-2 project given a go. OH NO!

[OkiePC]

From my searching of the manual in the link above:
MCR is like the old Honeywell Skip And De-energize. The MCR executes the logic inside the zone as false, as if you were to take all the conditions on the first MCR rung and put them on every rung within it the zone as "straight" logic.

The MCR is designed to turn off sections of outputs.

The ZCL is more like the SKP (skip, jump) in that it does not even process what's inside the JMP/LBL pair (Logix5/500 lingo) SKP zone (Honeywell) or ZCL zone (PLC-2). I am stating that based on this quote from the manual "When ZCL zone is false all outputs remain in their last state", not from any personal experience with the PLC-2.

Is this acceptable to do to accomplish the same thing being done with the MCR in the PLC-2 program I posted?

YES, that's the preferred way to do things in my opinion. If there are many repeats, assign them to one bit and use that bit on subsequent rungs...skipping ladder logic controlling discrete real world devices is asking for trouble...it will work fine but at some point there will be confusion at the least.

I noticed in the book, in one place they show the ZCL being terminated with a MCR instruction, and in another section they bracket the ZCL zone with ZCL instructions?

 

[Lancie1]

I am stating that based on this quote from the manual "When ZCL zone is false all outputs remain in their last state", not from any personal experience with the PLC-2.

The old ZCL (Zone Control Last State) instruction is a "freeze" relay. You use it in pairs, similar to the MCR. From the rung below the first ZCL to the next ZCL (the ZCL "zone"), when the ZCL goes false or is de-energized by the trigger input(s), all outputs between the ZCL instructions are left in their last state (not changed from either on or off) even though their rung inputs may change while the ZCL trigger is on.

To simulate it in a SLC 500 program, one way is to set up a subroutine that includes all the rungs in the ZCL zone. Then use the old ZCL trigger input(s) to call the new subroutine. If the subroutine is not called, any outputs inside the subroutine are left in the last state before the subroutine call.

I noticed in the book, in one place they show the ZCL being terminated with a MCR instruction, and in another section they bracket the ZCL zone with ZCL instructions?

The first example is probably really the beginning of a new MCR group after a ZCL zone. The ZCL must have a corresponding ZCL end instruction, sooner or later. MCRs should NOT be overlapped with a ZCL. Overlapping MCRs and ZCLs result in unpredictable operation.

The difference between the ZCL and the MCR is that when false the ZCL freezes all the outputs in the zone, where the MCR when false turns off all outputs.

 

[The Plc Kid]

@ The OP

Instructions like the MCR and the older way of doing things in these processors like the plc 2 is the primary reson your printed program should be used as a very simple guideline and not try to be copied as is into another platform.

The way a lot of things were done in the plc 2 and older processors was not wrong it had to be done that way back then but platforms now things can be done in a better less confusion and easier to troubleshoot fashion.

That is why it is difficult to convert code from a older platform to todays technology and when people do get into conversion they end up doing almost a total rewrite by the end of the project anyways.

Use the old program as a guide for IO and to get a general idea of what the machine would do but don't try to replicate that old code into a new platform like micro or slc. It will be a disaster.

 

[Lancie1]

If the subroutine is not called, any outputs inside the subroutine are left in the last state before the subroutine call.

Correction: If the subroutine is not called, any outputs inside the subroutine are left in the last states set during the previous subroutine call.

As the Kid said, when converting old programs, you may wind up with a total rewrite. The key is that you have to either start from scratch, or learn enough about the old logic so that you can reproduce it with whatever instructions are available in your new software. I usually wind up studying and reproducing instead of doing a total rewrite. To do a total rewrite on a complicated program requires hands-on knowledge of the machinery or equipment. Many programmers do not get that luxury, so are stuck with reproducing the old logic in new software. I once had to convert an old bag palletizer from PLC2 to PLC5, and then modify it to stack the bags to a differnt height in a different pattern. I could have started over, but the problem is that the boss bought the palletizer used, and I saw it operate one time before we shut it down, loaded it on trucks and hauled it to our factory. So my knowledge of how it operated was nil. I had to rely on figuring out how the old PLC2 instructions worked and then converting them. Once I studied the old program and the machinery enough to do the modifications, I felt like I could have THEN done a rewrite, but why bother - the PLC5 was working by that point.

EDIT: As a follow-up, when I figured out how each rung operated in the new PLC5 program, I wrote a detailed rung comment description. About 10 years later, Production decided to convert the PLC5 to an SLC 5/04 because it was the only PLC5 left. Our maintenance electrician said, "I can do it, because each rung has a good description of what it does". He was right and he was able to do the conversion PLC5-to-SLC 5/04 all by himself.

 

[padees]

FYI: PLC 5 is being obsoleted early (March) 2013. A number of SLC modules are/have been mothballed already also. Been to an A-B Tech seminar a few months ago and they advised not to use this stuff on a long term project. I have a few customers with PLC 5's and will be replacing them with CLX. A couple of roller coasters also.

 

[Skiroy]

@ The OP

Instructions like the MCR and the older way of doing things in these processors like the plc 2 is the primary reson your printed program should be used as a very simple guideline and not try to be copied as is into another platform.

The way a lot of things were done in the plc 2 and older processors was not wrong it had to be done that way back then but platforms now things can be done in a better less confusion and easier to troubleshoot fashion.

That is why it is difficult to convert code from a older platform to todays technology and when people do get into conversion they end up doing almost a total rewrite by the end of the project anyways.

Use the old program as a guide for IO and to get a general idea of what the machine would do but don't try to replicate that old code into a new platform like micro or slc. It will be a disaster.

I understand this but I am fresh out of college and this is my single oportunity to get hands on at this comoany with a PLC so I have to try. And I get what your saying but I have to understand the old programming to figure out what is going on in it,if I am going to rewrite it,right?

1.
For eaxmple Im still not understanding how to reconize how they did the timers and counters in this program. Everything else looks straight foward. But how do I reconize the Timer Enables,Done and Resest instructions?

2. In RS Logix 500 what are the address limitations for B3 storage(dummy bits). ie. B3:0/01-B3:0/32? Then move to B3:1/01?

 

[OkiePC]

I understand this but I am fresh out of college and this is my single oportunity to get hands on at this comoany with a PLC so I have to try. And I get what your saying but I have to understand the old programming to figure out what is going on in it,if I am going to rewrite it,right?

To translate it, you need a complete understanding of the old system, how it is wired, how it will be rewired to the new system, and how the new system (Micrologix) works.

To rewrite it, you need a complete understanding of the machine and the controls you will be connecting to the new system and a complete understanding of the new system.

In either case, you need help from someone with more experience. Even if this is a simple machine, don't make a PLC2 translation your first PLC job, and don't try to write your first PLC program from scratch for a machine you don't completely understand and try to do it all by yourself.

2. In RS Logix 500 what are the address limitations for B3 storage(dummy bits). ie. B3:0/01-B3:0/32? Then move to B3:1/01?

User defined files can contain up to 256 elements. A binary file like B3 can then have 256 of the 16 bit integers that can be addressed a number of different ways.

For a bit level address, the colon is the optional word delimiter and the backslash is the required bit delimiter, so B3/4095 is a legal address if you have the B3 file configured for 256 elements. It would be the same address as B3:255/15. RSLogix will change your entry to the style of address display when you verify a rung. You can choose how the bit addresses are displayed by visiting the options menu. You can right click on a valid address and select "Goto Data Table" to pop up the data table window and have the bit highlighted with your cursor to see how it fits into the whole file.

 

[Skiroy]

I hear you. But there is no one with experience.Even if I cant follow through or it fails Im going to try to give it a shot even if the have someone else do it.

I think I have the timers figured out.
Looking at the PLC-2 Programming guide on page 31

http://dl.dropbox.com/u/96052065/PLC-2%20PROG.%20MANUAL.pdf

It looks like 030 would be the Timer. 030.17 would be the EN bit and 030.15 would be the DN bit. Can anyone verify this?

And what is the difference between the TT(timer timing) bit and the Enable bit besides the TT resets itself when AC=PR,while the EN bit only resets when the rung goes false?

 

[Helliana]

.TT is active when the Timer is Timing.
.EN is active when the timer is Enabled.

Now think about it for a second. For the .DN bit to work, the timer must still be enabled, however, however it is not timing. When the timer is no longer enabled, the timer completely resets.

Therefore, the .TT bit is active ONLY when the timer is timing. The EN bit is active when the timer is timing OR completed.

 

[Skiroy]

One last question for you guys then Im gonna get to writing. I noticed if you look at the PLC-2 Programming PDF that Timer 030 is used on multiple rungs. Not the Dn or En bits but the actual Timer address. Can this be done in RS Logix 500? I was under the impression that you can on use T4:0 TON once on one rung.

 

[Skiroy]

.TT is active when the Timer is Timing.
.EN is active when the timer is Enabled.

Now think about it for a second. For the .DN bit to work, the timer must still be enabled, however, however it is not timing. When the timer is no longer enabled, the timer completely resets.

Therefore, the .TT bit is active ONLY when the timer is timing. The EN bit is active when the timer is timing OR completed.

Thank You guys for being so helpfull. You guys are literally my only resource and experienced mentors. I have alot on my plate with this but I know I can get it and it will be my ticket out of this place even if I dont pull it off it will give me the experience I need to move on.So know your really appreciated and important for my success.

 

[alan_505]

You can use the any of the timer bits (EN, DN, TT) or the ACC value anywhere in the program, you could have more than 1 T4:0 timer but they would not work as you would expect them to, you are correct in saying you should have only 1 instance of the timer.

 

[Lancie1]

It looks like 030 would be the Timer. 030.17 would be the EN bit and 030.15 would be the DN bit. Can anyone verify this?

Yes, those bit locations are correct for the Allen Bradley PLC2 timers and counters. Notice that "030" is the first word location allowed for timers, so Timer 030 is the first one. For the PLC2 software, those addresses would be properly written 030/17 and 030/15. Read your manual and you will find that the "/" was used as the delimiter between the "www/bb" address for the PLC2.

As for the "*.TT" Timer Timing bit that you have in RSLogix 500, you have to create that bit in PLC2 by using a NC Bit 15 AND NO Bit 17. You can use Bits 14-17 of the Timer Preset Value word (which is always 100 words higher than the Timer Accumulated Value Word) for other purposes, such as creating a "Timer Timing" bit located at 130/16:

 

| Timer 0 Done    Timer 0      Timer 0  |

| (AC = PR)       Enabled      Timing   |

|  030/15          030/17      130/16   |

|---|/|-------------| |---------(  )----|

|                                       |

 

[Skiroy]

One last question for you guys then Im gonna get to writing. I noticed if you look at the PLC-2 Programming PDF that Timer 030 is used on multiple rungs. Not the Dn or En bits but the actual Timer address. How would I accomplish this in RS Logix? This is my biggest hurdle right now on approaching the programming. If they are using the same Timer in multiple rungs I then have no way of knowing which DN and EN bits belong to which timer. This could make this a big problem for me.

 

[OkiePC]

One last question for you guys then Im gonna get to writing. I noticed if you look at the PLC-2 Programming PDF that Timer 030 is used on multiple rungs. Not the Dn or En bits but the actual Timer address. How would I accomplish this in RS Logix? This is my biggest hurdle right now on approaching the programming. If they are using the same Timer in multiple rungs I then have no way of knowing which DN and EN bits belong to which timer. This could make this a big problem for me.

You only want one TON timer or TOF timer instruction per timer element address. Are you seeing duplicates of the timer instructions in your old PLC-2 machine program? If they are in the User Manual, then I would bet they are just examples that the writers copied and pasted, not intended to be functional code, just examples to go along with the accompanying text.

So, Skiroy, are you trying to do a verbatim translation from a running machine? I am still a bit unclear on the scope of your task.