Quickpanel DH+ and Controllogix addressing

Hussey

Member
Join Date
Mar 2003
Location
Kennewick WA
Posts
3
Does anyone have a source for addressing structure for communicating between an A/B controllogix processor via a DHRIO card to a Quickpanel touchscreen?
 
The basics of PLC/SLC address mapping were recently discussed on this forum in this thread:

http://www.plctalk.net/qanda/showthread.php?s=&threadid=2718

The additional trick you'll use that paneltec didn't have to is to tell the 1756-DHRIO what slot the ControlLogix CPU is in.

A-B devices that support the CIP protocols (like ControlLogix) can describe the backplane path from the DHRIO to the processor, but most 3rd party drivers expect the DH+ node to be built into the processor like on a PLC-5 or SLC-5/04.

Right-click on the DHRIO in any RSWho browse, select Module Configuration, and I recall that the "Default Slot" value is on the general parameters page.
 
DHRIO and Quick Panel

This is from the Quick Designer Software Help. Access this help from the Protocol setup dialog box.

Code:
  Remote I/O Tag Variable Table
          Device           Address    Bit     Bit    DataData Data
          Read  Description
          Prefix Range    delimiter   Range  Range  Data
                                       Min.    Max.          Words
          I:    0-377     /    0-17  -32768  32767  16  Both Inputs
          O:    0-377     /    0-17  -32768  32767  16  Read Outputs  Doubles
          AI:   0-376     n/a  n/a   0       99999999   32   Both Double Inputs BCD
          AO:   0-376     n/a  n/a   0       99999999   32   Read Double Outputs BCD
          LI:   0-376     n/a  n/a   -99999999      99999999 32   Both  Long Inputs
          LO:   0-376     n/a  n/a   -99999999      99999999 32   Read  Long Outputs
          ABR@  0.0-3771.63    n/a   n/a     0      99999999 32   Both  Double BTR-1
          ABW@  0.0-3771.63    n/a   n/a     0      99999999 32   Read  Double BTW-1
          LBR@  0.0-3771.63    n/a   n/a     -99999999  99999999  32    Both      Long BTR-1
          LBW@  0.0-3771.63    n/a   n/a     -99999999  99999999  32    Read      Long BTW-1
	  The device prefix and address delimiter are shown together. 
          Example, AO: where AO is the prefix and : is the delimiter. 
          Note the delimiter for the BTR and BTW  types is the @. 
          The address syntax is rrgs.oo (rr = rack (octal), g = group, s = slot, oo = offset (decimal))
          Double block transfer variables require proper setup of the 
          actual block transfer in the protocol setup.
There is Much more there.
 

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