Siemens Step7 / Braumat 5.3...HELP!!!

[Eric.Noe]

I will check the VAT table right now and get back to you in a couple min. Take a look at post #74 on page 5. What is the deal with "Time Stamping"?

Should this be something that we need to take into concideration?

 

[JesperMP]

Should this be something that we need to take into concideration?

Yes, definetely.
But my angle of attack would be to get the hardware addreses working 1st, and then move onto the various software problems.

I suspect that you have more than one problem at the same time. This may be the reason why it is not so straightforward to solve this problem.

It will be difficult to track down the bugs, because appearantly much indirect addressing has been used, together with SFC, SCL and protected blocks.

I do not like the "Statement is waiting for addresses" message. I have never seen before that code on the CPU can be corrupted. Is it possible ?

 

[Eric.Noe]

The code on the CPU should be fine. While im working on this, I try to do a Memory Reset and clear out the CPU whenever i make even a slight change or try something new so i know i have good clean data on the PLC.

This is showing a Syntax Error for the Call command. How should the code be written so it is correct?

.eric

P.S. VAT table will be up shortly.

 

[JesperMP]

There should be a block number after the "CALL".
Also, there is no "End Call" instruction.
This looks like code that the programmer never finished.

 

[Eric.Noe]

Here is the VAT table. The blue icon next to IW536 and IW538 is saying "This address cannot be monitored".

I CAN force the values and they DO change in the Process Image. Do you want any more information from the Hardware Diagnostics?

.eric

 

[JesperMP]

That it says that the values cannot be monitored is because the PIW addresses hasnt been assigned to a "proces image" (= the IW addresses for the CPU). That is OK.
It is the "0" values of the PIW addresses that are baffling me. I am running out of ideas.

 

[Eric.Noe]

Going back to the syntax of the call, you said that there needs to be a block number after "Call". From looking at this image......

...would you guess that it is calling on block FC500? If so should i try to change the syntax of that Call to

Call FC500
BLD 1
= L 40.0
CLR
= L 40.1
SET
= L 40.2
UC "ESG_IN_OUT_FC"
P#L 40.1
P#L 40.2
BLD 2
End Call

Im not sure if that is correct or not. But should it be changed to something similar to that? There is a bunch of errors in the STL editor about time stamp conflicts when i open blocks FC700 and FC701. Those two blocks are labeled "INPUT_FC" and "OUTPUT_FC". The comment on the blocks says that they are "Rangierung der Eingabeschnittstellen (E/M)" and "Rangierung der Ausgabeschnittstellen (A/M)"


.eric

 

[JesperMP]

About the "CALL" and "End Call" before, I think that they are simply comments where the "//" have been lost for some reason.
There is an "UC" (unconditional jump to block) in the code.
That must be what the comments are referring to.

 

[JesperMP]

Hey, but this COULD point to something !!!

The "bad" comments means that the block cannot be compiled, and if it is downloaded it will cause the aforementioned "Waiting for addresses error". This because the CPU interprets the "Comment" CALL as a real call to a block.

Maybe this is because the code is really from SCL or SFC, and STL cannot view it properly.

 

[Eric.Noe]

That it says that the values cannot be monitored is because the PIW addresses hasnt been assigned to a "proces image" (= the IW addresses for the CPU). That is OK.

The PIW CAN be monitored. The IW is what cannot be monitored. What is the difference between the IW and PIW.

Alright, how about this. Lets say i wanted to add a new PT-100 to our system. I know how to put the RTD into the module and wire the PT-100. I can go into the HW Config and add a RTD and address it into the software. I know how to add a new symbol w/ the address of the RTD. I can set up a new display in the Process Image. How do you set up the link of the addresses between the HW Config and the Process Image Designer?

.eric

 

[Eric.Noe]

Hey, but this COULD point to something !!!

The "bad" comments means that the block cannot be compiled, and if it is downloaded it will cause the aforementioned "Waiting for addresses error". This because the CPU interprets the "Comment" CALL as a real call to a block.

Maybe this is because the code is really from SCL or SFC, and STL cannot view it properly.

I HOPE! When i open the editor, by default it opens in STL view. When i try to change to LAD or FDB it gives me an error saying "Unable to compile network 4 because there are still invalid statements in it." By the descripiton of the block, would you think that this controls ALL of the inputs and outputs or at least has something to do with all of them? The reason i ask is that all of our other RTD's (inputs) work fine. I wonder if maybe these two blocks (FC700 / 701) are only used for the 2 RTD's that we are working on. These two do have somewhat of a special function. They are the Sparge Water into the brew-house, if you know what that means. There are two mixing valves right after the temp sensors. One of the temp sensors is for the hot water and the other for the cold. It reads the values of the hot/cold water comming into the brew-house and then adjusts the valves accordingly to get a desired water tempreature comming into the brew-house. None of the other RTD's are used in this way. Furthermore, there are 2 errors per FC block, and 2 RTD's that are not working. This seems a little to coincidental to me. It seems like there is a relationship with the errors in the FC blocks and our RTD's not working. Give it some thought. I am going to grab a sandwich and ill be back in 10.


.eric

 

[JesperMP]

What is the difference between the IW and PIW.

IW and QW addresses are scanned by the CPU before and after the call to OB1.
PIW and PQW adresses are scanned the moment the CPU meets them when executing the code that refers to them.
It is an option to assign the PIW addresses to the proces image (thereby making the equivalent IW addresses active). This is done in the HW config for each io module.

The problem of adding extra analog modules as you propose, and then make the right software changes on the S7 and the Braumat software is that we must then understand how the original programmer has done that for the other addresses.

I think that a good idea at the moment is to download good working blocks onto the CPU.

Your best bet is to find an old backup where you havent opened any of the blocks in STL and/or saved them. The problem may be that you need the various software options that the original programmers have used. Opening+saving the blocks without the right options may have corrupted them.

 

[JesperMP]

there are 2 errors per FC block, and 2 RTD's that are not working. This seems a little to coincidental to me. It seems like there is a relationship with the errors in the FC blocks and our RTD's not working. Give it some thought.

You may very well be right. A quick shot at it would be to "comment" the CALL and End Call (place "//" before them), save the blocks and download them.

 

[Eric.Noe]

Alright...i did what you said. I did a memory reset on the PLC and i am uploading the blocks right now. Here are some screen shots of what the code looked like before, and then one of what it changed to after putting the // in front of the Call and EndCall.

Before:

After:

Does that look right? It looks like it totally changed the code. I will let you know what happened after everything is done downloading. Thanks for your help again. Greatly appreciated.

.eric

 

[Eric.Noe]

Quick simple question for you Jesper.

We are trying to download an old copy of our program. Way back when the Siemens people were here upgrading our Braumat software, they told us a specific order and what to load / not load when reseting the PLC. They said to first; open the hardware in the HW Config and download that the PLC. Then download all of the blocks, but not the "Sytem Data" folder. Then, carry out a warm restart. Is the HW Config saved to the System Data folder when it is saved and compiled? More so, is that the correct order to restart the PLC?

.eric