When using RSL500, I can indirectly address an unconditionally enabled coil and so long as it is immediately preceded by a FLL function that covers the word(s) containing the indirectly addressed bits, then only one bit is ever set at any time. I use this structure for bit-sequencers and it works well.
With RSL5000 I can do the indirect thing with a bool array but I can't find a way to replicate the FLL function and universally clear in one instruction the contents of a bool array (in this case, 128 bits).
Given the near-instantaneous scan regime in the L53x processors, would a preceding unlatch with the same indirect address as the "decoded" bit be guaranteed to clear that decoded bit every scan prior to it being set again or could it sometimes miss the target depending on when the value of the indexer is changed and leave a series of set bits in the bool array?
Or am I missing a simple bool array clear function?
With RSL5000 I can do the indirect thing with a bool array but I can't find a way to replicate the FLL function and universally clear in one instruction the contents of a bool array (in this case, 128 bits).
Given the near-instantaneous scan regime in the L53x processors, would a preceding unlatch with the same indirect address as the "decoded" bit be guaranteed to clear that decoded bit every scan prior to it being set again or could it sometimes miss the target depending on when the value of the indexer is changed and leave a series of set bits in the bool array?
Or am I missing a simple bool array clear function?