trying to avoid using a lot of GRT and LES

[thefreeauction]

Ok, this should be and easy one for the experts. I'm using Logix 500 and a lot of GRT and LES to do this:

I have a valve opening for 5 seconds, then closing for 5 seconds, alternating back and forth for 10 minutes. There's gotta be a better way than how I'm doing it now. Right now I have a timer for 10 minutes, and am using one GRT and one LES for each 5 second cycle. Which equates to a long line of code! (and doesn't look good either imo)

I've been bangin my head for a while trying to find something that works, I would think there is a simple solution (if there is I can't figure it out! ) for this!!

Can anyone point me in the right direction? Or am I just stuck doing it this way?

Thanks,
Dan

 

[bernie_carlton]

Have a ten second timer, open for 5 seconds, close for 5 seconds. Do 60 of those cycles (use a counter).

And save your head.

 

[hd_coop]

Try something like this.

 

[thefreeauction]

Thanks, you guys are quick!
Now that you guys pointed this out, I'm thinkin "why didn't I think of that?"

That should help out a lot, thanks,
Dan

 

[gmferg]

How about a 10 second timer which you reset when it's done.

XIC T4:0/TT  XIO T4:1/DN       TON T4:1 0.01 1000

T4:0 is your 10 minute timer.

Then you just need one GRT 500 instruction.

 

[OkiePC]

If you can tolerate 5.12 seconds on and 5.12 seconds off, then just:

XIC S:4/9 OTE Your_Valve

That bit S:4/9 is in the free running clock and changes states every 5120ms.

 

[thefreeauction]

Awesome! Using S:4/9 will work! As long as the engineer doesn't change his mind about the timing again.

Thanks again,
Dan

If you can tolerate 5.12 seconds on and 5.12 seconds off, then just:

XIC S:4/9 OTE Your_Valve

That bit S:4/9 is in the free running clock and changes states every 5120ms.

 

[Paul T]

Awesome! Using S:4/9 will work! As long as the engineer doesn't change his mind about the timing again.

Thanks again,
Dan

Uh-uh. Go back to a pair of timers and a counter, or a timer and a MOD instruction.
Edit - actually, skip that SLCs don't have a modulus function. But you can do a divide, then look at the remainder register - S:13 - and wait for it to become zero. Same difference.

Engineers ALWAYS change their minds... and if they don't, you can bet your next paycheck that manufacturing will!

 

[Peter Nachtwey]

Why do I always need to ask questions?
How precise does this need to be? The problem with timers is that the actual time is almost always longer. After a while you will notice the error.
The way I would do this is to use the free running clock and toggle the output bit every time the free running clock has passed a previous value by 5000 milliseconds. After the output is toggled I would add 5000 millisecond to the 'previous value'. Errors in time can't accumulate this way. Only one greater or equal is required.

 

[Doug-P]

You could also use a free-running timer conditioned by a counter. Set the timer for 5.0 seconds and use its done bit to increment the counter, which has a preset of 120. Use the counter accumulated bit zero (C4:3/0) to operate the valve. When the counter reaches preset the sequence ends.

Not as elegant as OkiePC's system clock but it has the virtue of being easily changeable.

YMMV

 

[ydtech]

I'd go for the two timers toggling each other, and the counter. Easy to modify when the engineer changes his mind. Also the easiest in case he wants asymmetric duty cycle, say 3s off and 7s on.

 

[bernie_carlton]

This is a model thread for the proposition that, given any task, even as incredibly simple as this one you'll get as many different ways of accomplishing it as you have programmers. Some have features like 'flexibility' in the face of wavering engineers. Others slavishly stuck to the problem as given. Even the original suggested method of a 'gajillion' compares counts as a 'way'. Isn't it a fun profession?